I managed to complete all the previous chips without too much trouble, but I can't seem to make a start on the ALU.

I've read a few posts on this forum from people with similar problems, only I've already looked at what was suggested to them, and I'm still clueless.

For example, I (eventually) noticed that a multiplexor might give me some sort of "if" functionality in logic, that might perhaps be useful in branching for zero/negative. I thought I'd work through the skeletal .hdl for the ALU and try to figure it out stage by stage, but I can't even see how I would make the multiplexor work in this context.

I know that for x, I need to get it in, zero and/or negate it based on the zx/nx bits, and then branch similarly depending on the value of "f". From a high-level, I think I can define

*what* it needs to do, but I'm really struggling to understand

*how* to achieve that spec with logic.

In fact, I'm so confused that I'm even struggling to explain how confused I am

I know it's not intended to be a five-minute job, but I feel like I could stare at it for 100 years and not get any further.

Also, I take it I'm correct in thinking that the nx/zx (plus y variant) bits are independent from the other bits, so their logic can be completely separate?

I'd really appreciate it if someone could perhaps put me on the right track. I have a tendency to over-think problems and miss glaringly obvious points, so I'm willing to admit I may have done that here, also!

Thanks