I've found Appendix A and understand the HDL format to *use* it for the courseware, but is there a formal specification of the HDL format floating around (like a BNF grammar) that one could use to write a lexer/parser for this format?
I'm not aware of any formal specification that exists. It shouldn't be hard to reverse engineer if you want to -- of course you might miss subtle things that aren't apparent in the example code you use, but other than the trick of using multiple instances of chip output ports to work around the inability to do subbussing on internal nodes, I don't think there is much subtlety involved.
Thank you. I suspected about as much after a fair bit of googling -- but you are right that my main concern is missing subtle points that I might not pick up with simpler examples.
I suppose a lexer/parser *must* exist in some form given the simulators process the HDL files... I haven't spent a whole lot of time looking, but have the authors open-sourced the simulator components?