If cpu want data in the RAM, cpu lets RAM to send data.
Because RAM is slow, it takes long time until data arrives.
How cpu knows what data is correct data, and when the data arrives?
The Nand2Tetris architecture requires that the RAM always responds with the data for the memory addressed by addressM in under one clock cycle.
This vastly simplifies the CPU and Computer chips built in chapter 5.
The Hardware Simulator simulates combinatorial logic as very much faster than the system clock, so memory access speed will always be sufficient.
If you're into numbers, think of it as a 25 MHz CPU running with 10 ns RAM.
In a more sophisticated Computer, there are handshake signals between the CPU and the memory controller that tell the CPU that it needs to wait for the data.