After having finally completed this, I figured I'd offer some tips to help people avoid the pitfalls I came across.
The first pitfall I came across while implementing the ALU was trying to feed all the possible operations into a single Mux8way16. While this probably can work, I was unable to find a solution that I could make work this way.
The second pitfall I came across is partially the source material's fault, and my own for not checking the ALU.tst and ALU.cmp while designing the ALU - The material describes negating a number and then incrementing that number by 1 to get the actual number. The way it's presented, I thought this step would need to be done using Not16 and Inc16. If you implement the ALU to pass the test, however, this is not how you do it. Where it says negate in the comments, it literally just means that. This was pretty difficult for me to figure out until I gave in and looked at the .tst and .cmp and then stepped through how it was expecting that.
The last pitfall I came across that wasn't completely self inflicted (I'd wired one of my mux's to the inverse of f) was the ng output. After a couple of hours trying to figure out how to do this without grabbing the highest ordered bit from x and y and passing those through a mini-ALU circuit seperately only to send them to ng (I absolutely refused to go that route even though I knew it'd work), I created a custom chip to do exactly what I knew it was looking for.
I came out to 16 chips in the ALU.hdl itself when I finally passed the ALU.tst and I have no idea how to get it any smaller than this, but I've seen other posts where it could be done in 15. I'm happy with my design, especially as I couldn't find a single circuit diagram that used what I'd planned on doing, so I literally had to design it myself. I had even reached out to a subreddit for help understanding a few things, to no avail because I couldn't explain what I was trying to explain well enough.
Hopefully, this information is useful to people in the future who get stuck like I did, without giving too much away. Minus the one chip I implemented to solve ng, and another I designed because there's no built in nor16, the rest of my design uses nothing but the built in chips (if you don't count using the implemented chips in this project, I forgot about the Add16), but I am confident it would work using my chips from project 1 as I mostly had little to no problems implementing them (once I better understood a couple of them).
Edit: another tip that I discovered while doing the Program Counter(PC) in Project 3: while you cant do something like sending out to another chip like this:
you most certainly can do something like this:
Figuring this out led me to bringing my ALU down to 15 chips. Don't know why I hadn't thought to try this. If this is written somewhere else, I've not seen it.
While I understand not having builtins with the answers in them, explaining how the Hardware simulator works should be the first chapter in the book concidering everything that follows relies on the use of that information, not relegating it to an appendix at the end of the book. Correction: I can find no where in Apendix A that mentions this. I originally, I was reading the chip header section and for some reason thought it referred to this.
thank oyu so much :). that last part when you wrote that you can do 2 outputs to the same gate really helped me.
I was so lost how people could use only 15 gate when I struggled and used way to many gates got me really frustrated.