Simpler add 16

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Simpler add 16

   I felt oblige to use a large number off pins for storing the carry of my HalfAdder computations.
This because the hdl won`t allow me to use an array x ad input and its increment as output.
Th code runs fine... is the an easier way to implement this?

   // Put you code here:
   HalfAdder(a=a[0], b=b[0], sum=out[0], carry=xa);
   FullAdder(a=a[1], b=b[1], c=xa, sum=out[1], carry=xb);
   FullAdder(a=a[2], b=b[2], c=xb, sum=out[2], carry=xc);
   FullAdder(a=a[3], b=b[3], c=xc, sum=out[3], carry=xd);
   FullAdder(a=a[4], b=b[4], c=xd, sum=out[4], carry=xe);
   FullAdder(a=a[5], b=b[5], c=xe, sum=out[5], carry=xf);
   FullAdder(a=a[6], b=b[6], c=xf, sum=out[6], carry=xg);
   FullAdder(a=a[7], b=b[7], c=xg, sum=out[7], carry=xh);
   FullAdder(a=a[8], b=b[8], c=xh, sum=out[8], carry=xi);
   FullAdder(a=a[9], b=b[9], c=xi, sum=out[9], carry=xj);
   FullAdder(a=a[10], b=b[10], c=xj, sum=out[10], carry=xk);
   FullAdder(a=a[11], b=b[11], c=xk, sum=out[11], carry=xl);
   FullAdder(a=a[12], b=b[12], c=xl, sum=out[12], carry=xm);
   FullAdder(a=a[13], b=b[13], c=xm, sum=out[13], carry=xn);
   FullAdder(a=a[14], b=b[14], c=xn, sum=out[14], carry=xo);
   FullAdder(a=a[15], b=b[15], c=xo, sum=out[15], carry=xp);
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Re: Simpler add 16

Unfortunately, the only buses you are allowed to have with this HDL are those that are defined as ports.

However, that doesn't mean that you can't come close.

If you would normally use x[0] though x[15] for your signal names, why use xa and xg and such? Why not use x0 through x15 instead?