You apply a 3-bit address to the DMux8 part and whatever value is on the input appears on the chosen output pin of the DMux8 part (with 0s on the other seven). This results in an 8-bit value in which at most one bit is a 1. This value is then latched into the DFFs on the rising edge of the clock.
I'm not aware of any useful purpose this part would serve within the Nand2Tetris project. Could you provide a link, or at least more details, on where you found it?
Based on that screen shot, they aren't talking about any particular part. Don't let the shape of the blue block imply something that isn't the case.
As the label states, what is inside the blue box is just some kind of combinatorial logic, meaning that whatever is presented at the input pins immediately produces the output and that it has no memory of any kind (i.e., no registers are inside that blue box).
Sequential logic (i.e., logic that does have memory -- meaning that the output is the result of a sequence of inputs and not just the current inputs) can, in general, be built by taking a combinatorial function and capturing the outputs in registers and then feeding those outputs back to the inputs of the combinatorial block, along with additional inputs.
Thus, as the equation in the diagram states, the state (which is the value stored in the registers) at time t is a function of the current inputs and the prior state (the state at time t-1).