1-bit register HDL implementation

[dolomiti7]

DFF has just one output called "out". In the above example this output is just connected to two different connectors. First it is connected to the output of the "Bit" chip and at the same time the output of DFF serves as input to Mux. This ensures that the state of the Bit doesn't change unless the load signal is 1. The Mux is then feeding the current state again into the DFF to ensure that the state of the DFF remains unchanged in the next cycle as long as load is 0.

[WBahn]

This is just the way that this HDL allows a wire to be connected to both an output pin of the part and also other things (the internal 'loop') signal.

Think of these pin assignments as telling someone how to connect wires together (because that's pretty much exactly what they are).

The DFF has two pins, named 'in' and 'out' (it also has a clock input, but you have no control over that). These names appear on the left side of the equals sign in a pin assignment.

The part you are building has wires connected to all of the input and output pins and each wire has the same name as the part pin it is connected to. So 'out' is the name of a wire connected to the Register's 'out' pin.

There are some rules that this HDL imposes that we have to abide by. One of those is that an output pin can't be connected to a component's input pin, at least not directly. To get around this, the HDL allows us to separately connect a component's output pin to as many different wires as we want using a separate assignment for each.

So the DFF's 'out' pin is connected to both the wire named 'loop' and the wire named 'out'.

[fmiren]

Thank you! It's clear now.