1Bit Register Comparison issue

[sharmaankush347]

I hv been using this code for 1 bit register but I am getting comparison failure ,
Kindly suggest me what should I change or Improve.

                   Mux (a=in, b=true, sel=false, out=out1mux);
                   DFF( in=out1mux, out=out1dff);
                   Mux( a=out1dff, b=in, sel=load, out=out2mux);
                   DFF( in=out2mux, out=out2dff);
                   Mux( a=out2dff, b=in, sel=load, out=out3mux);
                   DFF( in=out3mux, out=out);
 Same problem comes if I remove last set of Mux and DFF chips and modify pins.

[WBahn]

It's a 1-bit register. It stores a single bit. You have three DFFs, which means that you are storing three bits of information.

You also have Mux parts with the sel line hardcoded to a fixed value, which means that the Mux serves no purpose.

Give those items some thought.

[sharmaankush347]

Main target is to handle input at time t=0, how may I handle that issue with just one set of mux and DFF

[WBahn]

What issue are you trying to address at t=0 specifically?

Just implement the behavior that the new output will be the input at the prior time if the load signal at the prior time was HI, otherwise the new output will be the prior output.

Don't overthink it.

The behavior at t=0 is NOT defined.

[sharmaankush347]

Oh yeah! I GOT It . Trick was itself in DFF , I just needed different outpin from the DFF.

On Wed, 19 Aug, 2020, 08:23 WBahn [via Nand2Tetris Questions and Answers Forum], <[hidden email]> wrote:

What issue are you trying to address at t=0 specifically?

Just implement the behavior that the new output will be the input at the prior time if the load signal at the prior time was HI, otherwise the new output will be the prior output.

Don't overthink it.

The behavior at t=0 is NOT defined.

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