4 bit Right shift

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4 bit Right shift

SreePran
How to implement 4 bit right shift register using D flip flop?
Is there any way to convert universal logic gates ( or ) to DFF and then implement 4 bit right shift register?
I am attaching the shift right code which I did using or gates, can you please help me to do the 4 bit right shift register using DFF. Thank you
Code:
CHIP ShiftRight{
     IN in[16];
     OUT out[16];
     
     PARTS:
     Or(a=false, b=in[15], out=out[15]);
     Or(a=false, b=in[15], out=out[14]);
     Or(a=false, b=in[14], out=out[13]);
     Or(a=false, b=in[13], out=out[12]);
     Or(a=false, b=in[12], out=out[11]);
     Or(a=false, b=in[11], out=out[10]);
     Or(a=false, b=in[10], out=out[9]);
     Or(a=false, b=in[9], out=out[8]);
     Or(a=false, b=in[8], out=out[7]);
     Or(a=false, b=in[7], out=out[6]);
     Or(a=false, b=in[6], out=out[5]);
     Or(a=false, b=in[5], out=out[4]);
     Or(a=false, b=in[4], out=out[3]);
     Or(a=false, b=in[3], out=out[2]);
     Or(a=false, b=in[2], out=out[1]);
     Or(a=false, b=in[1], out=out[0]);
}
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Re: 4 bit Right shift

WBahn
Administrator
I'm assuming that you are using an OR gate to act like a buffer because the HDL doesn't let you pass an input signal directly to an output?

It looks like this part would just do an arithmetic right shift by 1 bit. Where the "4 bit" in your title from from?
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Re: 4 bit Right shift

SreePran
Basically what I need to do is the input number(4 bit) should get shifted to the right side. What I did was for 16 bit right shift using or gates. Can you please tell how to implement for 4 bit number using DFF( D flip flop).
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Re: 4 bit Right shift

WBahn
Administrator
So where does this 4-bit number start out? At the left (most-significant) bits of a 16-bit word?

What do you want to happen to the upper 12 bits in the result?

Why are you involving a DFF at all? It's a purely combinatorial task.

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Re: 4 bit Right shift

SreePran
It starts at MSB (4 bit number: abcd), it should be sequential and we need to do it using DFF. Its a 4 bit number itself, not a 16 bit number. 1.png
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Re: 4 bit Right shift

WBahn
Administrator
SreePran wrote
It starts at MSB (4 bit number: abcd), it should be sequential and we need to do it using DFF. Its a 4 bit number itself, not a 16 bit number. 1.png
The circuit you show in the link is completely unrelated to the chip description you have in your first post.

Your chip has a 16-bit input and a 16-bit output.

Your picture has a 1-bit input and a 4-bit output.

Do you need to implement the reset functionality?

Why are you doing this? There's nothing in the Nand-2-Tetris project that needs this. Is this an additional assignment that you've been given?
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Re: 4 bit Right shift

SreePran
It is not a additional assignment given to me but ya I was not getting this question, I am not sure about the reset functionality. We need to implement a 4 bit right shift register using DFF.
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Re: 4 bit Right shift

WBahn
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If it's not an assignment, why are you doing it?
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Re: 4 bit Right shift

SreePran
It was given for us to try and submit it
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Re: 4 bit Right shift

WBahn
Administrator
Just keep in mind that and HDL file is nothing more than a description how how to wire something up. If you have a schematic (which you do), then just assign every wire a name (in the inputs and outputs already have names) and then use those names to connect the corresponding pins on all the charts. But you need to decide how you are going to handle the reset because the DFF you have available doesn't have a reset input. One way to do that would be to first focus on designing a part, say DFFR, that does have a reset input.
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Re: 4 bit Right shift

SreePran
Thank you
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Re: 4 bit Right shift

nandhim
In reply to this post by WBahn
sir just give a code for 4 bit shift register that performs right shifting using d flip flop
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Re: 4 bit Right shift

nandhim
otherwise half of the code is enough please type the starting of the code i am not getting hoe to start the code
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Re: 4 bit Right shift

WBahn
Administrator
In reply to this post by nandhim
I'm not going to do your work for you -- that defeats the entire purpose.

You have a schematic. Forget about the reset behavior (at least for now) and write an HDL description of that schematic.