Administrator
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We need a more detailed description of what is giving you problems in order to provide useful suggestions.
What have you tried so far?
Take it little by little.
You have a control bit, zx, that determines whether the input signal x is allowed through or is forced to be zero. Can you implement some HDL code that results in a signal, perhaps called x_zx, that will be equal to x when zx is 0 and equal to zero when zx is 1?
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