ALU part

[SuperMiguel]

So i stared reading the book 2 days ago, just finished reading chapter 2, I did all the exercises from chapter 1 no problem, did all but the ALU from chapter 2.. understood them all... But i stroke out on the ALU project..

I looked at worksheet(http://nand2tetris-questions-and-answers-forum.32033.n3.nabble.com/file/n95834/alu_worksheet.pdf)

but im still not quite sure how to make this one work... I did look only and did see how other people did this one, but still reading their .hdl file took me no where, still not getting it..

[ybakos]

Did you look at the worksheet or did you complete it? It's goal is to open your mind to believing how the combination of those operations on x/y/etc can actually yield more "complex" functions.

[SuperMiguel]

just looked at, ill complete it in few minutes and post back..

[SuperMiguel]

So i did all of it... but still unsure on how to pick the operation... I know if i wanted to do x|y it would be: 010101 but how do i input that in?

[SuperMiguel]

So there are 7 basic operations:

x = ~x
x = 0
y = ~y
y = 0
x + y
x & y
out = ~out

I did code all 7 of them, just can visualize when to use them...

The only way i can think about this is mux16, and make the sel pin, my zx,nx,zy, etc

[cadet1620]

SuperMiguel wrote

So i did all of it... but still unsure on how to pick the operation... I know if i wanted to do x|y it would be: 010101 but how do i input that in?

Look at the column labels at the top of the ALU truth table. Those are all INPUTS to the ALU.

zx	nx	zy	ny	f	no		out
0	1	0	1	0	1		x|y

From the description in ALU.hdl:

 * The ALU operation can be described using the following pseudocode:
 *     if zx=1 set x = 0       // 16-bit zero constant
 *     if nx=1 set x = !x      // Bit-wise negation
 *     if zy=1 set y = 0       // 16-bit zero constant
 *     if ny=1 set y = !y      // Bit-wise negation
 *     if f=1  set out = x + y // Integer 2's complement addition
 *     else    set out = x & y // Bit-wise And
 *     if no=1 set out = !out  // Bit-wise negation

Each of these lines tell you what logic occurs at that step. The first line tells you that you need some logic controlled by zx that either passes x through unchanged or output a zero. The identical logic block is used to process y and zy. The overall circuit looks like this:

Fill in the functions for the unlabeled blocks and design the logic for those blocks, and you'll have the computation part of the ALU.

I'll leave the status bits for you to do. Be sure that you understand that you can connect more than one wire/bus to the outputs of parts used in your chip.

--Mark

[cadet1620]

Overlapping posts!

Yes, you are on the right track to use Mux16 in the implementation of the sub-blocks.

--Mark

[SuperMiguel]

Thank you very much for the reply, i know understand what i need to do.. i done it already but still fails, there is a bug somewhere... Is there a way to post the code? i know on the rules says not to

[SuperMiguel]

I did blocked out my code but: http://i.imgur.com/n5vXy.jpg

The result from the first test should be 0, my out is equal to 0, but im getting an error.. why is that?

[cadet1620]

SuperMiguel wrote

I did blocked out my code but: http://i.imgur.com/n5vXy.jpg

The result from the first test should be 0, my out is equal to 0, but im getting an error.. why is that?

A common problem is errors implementing the zr and ng outputs. This post has test files for the ALU that don't require the status outputs to be correct. It's much easier to get out working correctly and then work on the status outputs.

If you want to, you can mail me your HDL and I'll be happy to take a look at it. (More > Reply to author)

--Mark

[SuperMiguel]

ok that worked, it passed all the test, i did message you my code.

[JustinM]

Mark,

I don't think I  could have figured out how to translate the ALU truth table to my working ALU without this diagram.

For previous parts I was able to start with a diagram first, then translate it to HDL.

Do many students know how to translate truth tables to diagrams like the ALU diagram you presented?

Thanks,
Justin

[cadet1620]

Recapping for people seeing this thread for the first time:

Figure 2.5 is the definition of the ALU. This is what you want to use to build your ALU.

Figure 2.6 isn't really a truth table, it's what I would call a function table. It lists what functions are computed by an ALU following the design presented in figure 2.5.  Its main use is for specifying what instruction bits need to be set for various computations.  You need to know what computations are available when you learn assembly language programming in chapter 4.  You need to know the exact bit combinations when you write an assembler in chapter 6.

It is possible to build an ALU from the function table, but as Justin says, it's a daunting task.  I did see one student's ALU that had individual circuits for each unique computation and a hierarchy of multiplexers that used the control bits to select the correct function.  This was a HUGE hdl file.

--Mark

[JustinM]

Thanks Mark. To clarify, I meant to say that I was able to figure out the diagram myself for the other parts. Anyway, back to reading chapter 3.