ALU

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ALU

SpartanHalo
Hi guys,

I'm studying ALU architecture. It has 18 functions and 6 control bits.
The inputs are 16 bits, so I use MUX16 for the first line:

Parts:

Mux16(a=x, b[0..15]=false, sel=zy, out=out1);


Why I can't use only Mux16?

I have 2 inputs and 1 control bits that I selected with SEL of Mux16.

I don't understand how to build ALU, so..

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Re: ALU

WBahn
Administrator
SpartanHalo wrote
Hi guys,

I'm studying ALU architecture. It has 18 functions and 6 control bits.
The inputs are 16 bits, so I use MUX16 for the first line:

Parts:

Mux16(a=x, b[0..15]=false, sel=zy, out=out1);


Why I can't use only Mux16?

I have 2 inputs and 1 control bits that I selected with SEL of Mux16.

I don't understand how to build ALU, so..
You ARE using a Mux16 for that part, so your question doesn't make a lot of sense.

Are you thinking that, somehow, you should be able to make the entire ALU with "only" Mux16 parts?
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Re: ALU

SpartanHalo
Correct!

I'm studying ALU and I would like to build only with MUX16.

ALU seems like a giant MUX with different sel "bit control".


Some opinion?
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Re: ALU

WBahn
Administrator
How do you propose to implement something like the Add16 using only Mux16 parts?

In point of fact, you COULD do it, because a 2-input Mux is a universal gate (if you are allowed to tie inputs HI or LO, which some strict definitions to not permit).

Not:
Mux(a=true, b=false, sel=in, out=out);

Or:
Mux(a=a, b=true, sel=b, out=out);

And:
Mux(a=false, b=b, sel=a, out=out);

At this point, you have all the basic operations and can not make anything.

But what's the point?

If you have a 4-input Mux, you can make any 2-input Boolean logic gate by simply tying the inputs HI that correspond to 1s in the truth table (and all the others LO). This is essentially how some ROMs work.

But, again, what's the point?

You can just treat the Mux as a fundamental part and then implement the Nand gate using a Mux-based And and a Mux-based Not and you are done -- the rest of the design is exactly the same.

Now, if you want to make an ALU by having a bunch of different functional blocks, like an Add16 and an And16, and an Sub16, and Not16, and name any other 16-bit function, you could certainly make an ALU in which you can just pipe the inputs to all of those blocks and pipe the output to different inputs on a big Mux and then use the select input to choose which function you want. Real ALUs do this to some degree by choosing between outputs of families of functions -- the Hack essentially does this by choosing between the Add family and the And family. But using conditioning logic before and/or after the functional blocks allows you to have a lot more functions for the same number of gates and/or gate delay. Many of those functions won't be particularly useful and therefore not worth putting into the ISA, but enough are to make it worth it.
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Re: ALU

dolomiti7
I guess in theory it would be possible by pre-computing all possible outcomes (let's say in a huge ROM or just as fixed wired inputs to an array of Mux'), treat all 38 (2×16+6) input bits as selectors and have cascaded Mux' to ultimately select the right result.
2^38 input combinations will only require ~2.7×10^11 pre-computed results... (and consequently even more Mux) ;-)

@Spartan good look with this approach...

Seriously, it appears to me that you should first study again what the ALU is really supposed to do before you jump prematurely into the implementation.
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Re: ALU

SpartanHalo
Hi,

thanks for your answer!


I know that ALU has 6 control bits, there are various combinations of this control bits. Every combination corresponds at 1 operation.

For example:

Control bits Combinations--> 011111 it means x + 1.

ALU has many operations like addition, difference, increment and logical operations.



Example:

A= 20
B= 3

Control bits will be: 000010





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Re: ALU

dolomiti7
There is no question in your post. what exactly do you want to know?

SpartanHalo wrote
I know that ALU has 6 control bits, there are various combinations of this control bits. Every combination corresponds at 1 operation.
While that is the implicit effect, it would be more precise to say: every control bit defines an operation/transformation on the input or output bits. The fact that a specific combination results for example in returning x+1 is just the mathematical consequence of the underlying operations linked to each of the control bits. Though the structure of the control bits has been defined and chosen intentionally, it is irrelevant for the implementation of the ALU (and not even necessary to understand) to know the overall result of the specific control bit combinations. It doesn't matter if a control bit combination like 011111 results in  (x+1) - as long as you follow the individual semantics of each individual control bit in your implementation. If control bit 0 is 0, then use x as input, else use 0, and so on...