About checking small parts in the CPU

[Thorvald]

So I am trying to figure out how to connect the logic in the CPU.

Specifically I am with the jump part. I have some gates that I think they do would
do the job, but before writting them in the CPU chip I would like to test them.

I know that every chip (or project) in the book has the corresponding testing, but
what about custom logic? Is there a way easy to implement it, or at least,
is there some webpage where to construct the logic and see if it gets the job done?

[cadet1620]

Thorvald wrote

I know that every chip (or project) in the book has the corresponding testing, but
what about custom logic? Is there a way easy to implement it, or at least,
is there some webpage where to construct the logic and see if it gets the job done?

The testing language is described in Appendix B which you can get from the n2t site:
    http://www.nand2tetris.org/chapters/appendix%20B.pdf

The easiest thing to do is to copy a .tst file for an existing chip that is similar to your custom chip and modify it as needed, changing the input values that get set and the output list values that get displayed.

Comment out the compare-to line so that the test will always run to completion.

If you want to explore your custom chips in a visual environment, I highly recommend Logisim:
    http://www.cburch.com/logisim/
Unfortunately, there is no way to transfer designs between Logisim and HDL.

--Mark