BIT CHIP

[Minoshi]

when i change the a = t1 and b = in the simulator works fine but if i run the above it shows error . I know same problem has been discussed but i can't understand why this happens because i am just interchanging the input pins but mux should choose between inputs depending on " sel " bit so what value goes in a or b should not matter .



i used the above diagram for chip refrence . Just think of that "in" wire (in---------->) below that fanned out output wire . It should not make a difference right ?

[cadet1620]

For the Bit to remember its previous value while 'load' = 0, the DFF's 'in' must be logically connected to its 'out'.

This means that DFF 'out' must be physically connected to the Mux input that the Mux selects for its output when its 'sel' = 0.

[Minoshi]

Thank you for taking out the time to answer cadet . I get the logic of connection but what i don't understand is why would the output of DFF be only selected when "load"=0 why not "in" be selected . You explained me the first part of my question but i am confused with why load = 0 allows the " dFF" output to be selected and not the "in" .I know the working of MUX . Depending on "sel" value it allows any one input to be selected to go to output but how do i know which one .
To be precise i am confused about why certain load value selects certain input . If possible can you also explain me how 4 way mux "sel" works as how certain combination of "sel" only allows certain input to go as output .
 Thanks again.

[cadet1620]

See my replay to your Coursera post.

Please pick one of the forums and don't post the same question to both; it gets quite confusing.

This is the better place to post because I get immediate email notifications for all posts. On the Coursera forums I only see new posts when I check the forum (a couple times a day).


Did you write your own DMux4Way and Mux4Way16 in project 1? You should know how the parts work internally. If you are asking about how you know which input is which in a schematic diagram.

In an engineering schematic, one of the inputs is labeled with an 'a' or a '0' and the other inputs are assumed to run sequentially from there. Sometimes the high end is also labeled, so an 8-way multiplexor may have inputs 0 and 7 labeled.

Often, in a block diagram as opposed to an engineering schematic, the inputs are not labeled and no numeric order is implied. The multiplexor just means "a choice is made between these inputs".

[cadet1620]

I just saw your detailed question about Mux4Way on the Coursea forum; I'll answer it there.

[Minoshi]

I am sorry for the inconvenience . I thought this forum and the coursera one are different . Thank you soo much for taking out the time to reply . I would post the questions here from next time .
Thank you for helping me out .

[cadet1620]

The forums are a bit different. This forum is intended to support independent students who are using the https://www.nand2tetris.org site. The Coursera n2t part 1 and n2t part 2 courses each have their own forums.

Issues specific to the Coursera courses, like homework submission problems, request for students to review your project 9 program submission, and reports about errors in the video lectures should be posted to the Coursera forum so that the Coursera students and staff will see them.

For general help about building your circuits and writing your software, I suggest searching both forums. If you want clarification of a post, add a question to its thread. If you don't get an an answer, then cross post to the other forum.

[Minoshi]

GOT IT . THANK YOU @CADET1620