CPU.hdl - Confusion On Comparison Failure

[craigtack]

For the CPU.hdl chip I'm receiving a comparison failure at line 4 of which I understand is because the compare file and out file lines don't match but I'm confused at the expected output for the D register. Line 4 of the compare file, really line 3, is the first C instruction and the D register is expected to have a value of 12345. I'm confused as to why. As this the first C instruction the D register should not commit to this new value until the next time step. Could someone explain how the D register can have a value of 12345 at time 1+?

CPU.cmp
|time| inM  |  instruction   |reset| outM  |writeM |addre| pc  |DRegiste|
|1+  |     0|1110110000010000|  0  |*******|   0   |12345|    1|  12345 |

CPU.out
|time| inM  |  instruction   |reset| outM  |writeM |addre| pc  |DRegiste|
|1+  |     0|1110110000010000|  0  |      0|   0   |12345|    1|      0 |

- Craig

[WBahn]

This is an issue that is idiosyncratic to how the built-in parts interface to the simulator.

There are two phases to the clock -- tick and tock. The authors' documentation doesn't define them terribly well and there seems to be a discrepancy between how parts you build and how the built in parts record values after a tick (that's a time with a '+' symbol after it). The built-in parts appear to output the values of the inputs to the memory storage elements, while parts you built show the output.

[craigtack]

I've somehow just figured out the issue. I was calling DRegister() twice. It's odd that that would have a side effect of not writing to the D register when the first call I make only connects to the output pin. Thanks for the quick response WBahn.