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Did your PC pass its tests back in project 3?
from dia 5.8 in chapter 5, the PC takes its input from the A-Register, but then what's not clear from that diagram, is that there are two control bits where only one is shown, load and inc
getting the Program Counter to work was the most difficult for me.
you have to think about when the CPU is suppose to jump to the address (load from A), or increment to the next address.
Once I determined the jump flag, the increment flag was "not" it. (it either jumps or increments, but not both)
remember, the jump bits are bit[2] (J1), bit[1] (J2), bit[0] (J3). Pay close attention to the Jump tables in chapter 4, notice that J1 is the same as neg, J2 is the same as equ/zero, and J3 is the same as pos
Create a logic table for Ng and Zr flags and combine with the J-flag table (fig 4.5)
I had to create an entire separate logic circuit for the Jump logic
...hope this helps.
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