CPU.hdl - understanding the load for ARegister and DRegister

[nadav]

Hello!
after many hours I done with the CPU.hdl by still I really want to understand some things.
I work according to the 5.3 video which there is a diagram of the CPU.

1. too make sure - the "load" for DRegister calculate by:
And (a=instruction[15], b=instruction[4], out=loadD);
cause this is only for C instruction?

2. ARegister - in the video 5.3 explained to us that load is instruction[5], but I tried to do that and CPU.hdl doesn't work correctly. just after I look up in google I see that "load" for ARegister is
And (a=instruction[15], b=instruction[4], out=blabla) and then Or with Ainstruction (that equal to Not instruction[15]). Why we need this Or?

Thank you!

[ybakos]

nadav wrote

1. too make sure - the "load" for DRegister calculate by:
And (a=instruction[15], b=instruction[4], out=loadD);
cause this is only for C instruction?

Yes. There is only one way to store a value in the D register: when it is the DEST of a C instruction. If we look at the raw bits of instructions, there are two cases when instruction[4] is a 1: a C instruction where D is the dest, and an A instruction that just happens to have instruction[4] bit that is a 1.

So you have to express "set the load for the D register when the instruction is a C instruction and D is the dest."

nadav wrote

2. ARegister - in the video 5.3 explained to us that load is instruction[5], but I tried to do that and CPU.hdl doesn't work correctly. just after I look up in google I see that "load" for ARegister is
And (a=instruction[15], b=instruction[4], out=blabla) and then Or with Ainstruction (that equal to Not instruction[15]). Why we need this Or?

Think about what I said above for the D register. Can you explain why this is a similar situation for the A register? (There are _two_ ways to store a value in the A register; what are they?)

[cadet1620]

nadav wrote

1. too make sure - the "load" for DRegister calculate by:
And (a=instruction[15], b=instruction[4], out=loadD);
cause this is only for C instruction?

That is correct. You don't want random @ instructions changing the D register if their value has bit 4 set.

2. ARegister - in the video 5.3 explained to us that load is instruction[5], but I tried to do that and CPU.hdl doesn't work correctly. just after I look up in google I see that "load" for ARegister is
And (a=instruction[15], b=instruction[4], out=blabla) and then Or with Ainstruction (that equal to Not instruction[15]). Why we need this Or?

Think about when the A register needs to be set. There are two ways to set it:

    @...     Any A-instruction
    A=...    C-instruction with d1 set

--Mark
[Too slow typing; ybakos beat me to the finish line!]

[nadav]

you guys are awesome, thank you.
Now I watched again the videos of A/D registers. Just want to check i get it:
@1   // A instruction. store 1 in A register
A=M  //C instruction. store content of RAM[1] to A register
and these are the 2 ways to enter somthing to A register, correct?

and store somthing in D register is only if C instrucion and d2 bit on.
Thank you!