Can't fan-out an input pin

[jephricon]

As part of my ALU implementation, I'm leveraging the zx flag to zero out the x bit as follows:
   
   //invert zx bit
   Not(in=zx,out=nzx);
   
   //And zx bit to x to, possibly, zero
   And16(a[0..15]=x[0..15], b[0..15]=nzx, out[0..15]=zxout[0..15]);


However, the Hardware simulator complains that the bus width of b(16) is different than nzx(1)!  I thought that the input pin could be fanned-out so that, effectively the syntax I'm using would assign the value of nzx to all of the b[0..15] pins.   Assigning b[0..15] to 'false' works.

Help?

[cadet1620]

You are correct, the Hardware Simulator does not support connecting a 1-bit signal to a multi-bit input, except for true and false which are special constants.

I initially wrote my ALU the same way you are, so I wrote a helper chip I called Bus16 with a 1-bit in and a 16-bit out. It contained
    And16(a=true, b[0]=in, b[1]=in, ... b[15]=n, out=out);

Then the code becomes
    Bus16(in=zx, out=zx16);
    Not16(in=zx16, out=nzx16);
    etc.
which isn't too ugly.

As I was writing the rest of the ALU, I realized that there was a way using a single chip from chapter 1 to do the conditional zeroing.  I'll let you puzzle that out yourself.

After I got done with the hardware chapters, I went back and did a cleanup pass using things I'd learned about N2T HDL, including rewriting my ALU.

Note that you don't need to write "a[0..15]=x[0..15]"; writing "a=x" means connect all the bits.

--Mark

[jephricon]

Thanks for that reply and clarification Mark.  That definitely helps.  

Well, I had a feeling that, assuming this was an actual limitation of the HDL syntax, that chapter 1's 16-bit de-multiplexer may come in handy here.   Using zx as a type
of 'selection' bit and using 'true' / 'false' to set banks of inputs to the DMux to one or the other value set using zx to control which one of these banks of 16-bits gets out may be the ticket.   Perhaps that'll be the quick solution you are alluding to....  ;-)

Thanks again!

Jeff