Slight_Of_Nand wrote
I was also confused by the reversing of the A and B pins on the Mux!
I'm not sure exactly what you are referring to, but I can guess.
In some diagrams, such as Fig 3.1, the idea being conveyed is pretty abstract and all that is needed to know is that you can use a Mux to select between the input signal and the current output of the DFF and that you use a 'load' signal to do so. The details of whether you use load=1 or load=0 to choose the input signal are irrelevant at this level, but those details are presented in the programmatic description below the diagram, which gives you sufficient information to determine whether the 'in' signal goes to the A or the B input of the Mux. As to whether the A or the B is drawn on the top or the bottom, that is up to the person drawing the figure and one choice usually results in a cleaner diagram than the other.
Personally, I always prefer put an indicator on the symbol showing which input is which. A common convention is to put a 0 or a dot next to the input that is active with the select signal(s) is(are) all zero and then have the inputs ordered in increasing binary order of the select signal(s) from there.
Could someone also clarify in a different way why out(t-1) is different to out = in(t-1)?
out(t-1) is the value of the output signal at time t-1 (or the time increment before the current one).
out = in(t-1) says that the output at the current time increment, or out(t), is equal to the value of the 'in' signal at the prior time increment.
I think I understand it, but I feel another perspective might help me fully grasp it.
Finally I assume you NEED the DFF in diagram 3.1; that is to say you could not get away with simply routing the output of the mux to one of it's own inputs? The DFF acts as a sort of delay?
Not only does it act as a delay, but it stores the value that was written into it for however long it is needed. The value on the 'in' signal is going to change on almost every clock cycle.