Clarification for Project 1

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Clarification for Project 1

Sparky
i just wanted to knw whether i can build and simulate chips based on the canonical representation of the truth table??? and moreover i have already implemented the MUX using this method and i get the same output as in .cmp file so i wanted to confirm again!!!

i have implemented the MUX using the implemented AND chips instead of NAND....and heres the implementation code....

CHIP Mux {

    IN  a, b, sel;
    OUT out;

    PARTS:
    Xor(a=b,b=sel,out=outbsel);
    Not(in=outbsel,out=outnot);
    And(a=a,b=outnot,out=outab1);
    Xor(a=a,b=sel,out=outasel);
    And(a=b,b=outasel,out=outab2);
    Or(a=outab1,b=outab2,out=out);
}

plz let me knw whether its right...
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Re: Clarification for Project 1

ybakos
That is correct. (And an important concept to realize!)
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Re: Clarification for Project 1

Sparky
thank you so much...im happy to hear that!!!but now i am stuck up with DeMUX..because i am not able to figure out how it can be implemented...i even tried using the canonical representation..but unable to do it....only half of the output is matched with the .cmp file output...is there any other way???
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Re: Clarification for Project 1

Sparky
i got it sir..i went through the other forum where they had posted about the chip implementation where we have multi outputs and different truth tables...i had initially constructed half of the implementation code and was unable to figure out the other half...but now i have understood it....
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Re: Clarification for Project 1

marz
This post was updated on .
CHIP Mux {

    IN  a, b, sel;
    OUT out;

    PARTS:
    [Correct HDL code removed by admin.]
}

I implemented the Mux chip this way, is it correct?

MarZ

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Re: Clarification for Project 1

ybakos
Please refrain from posting entire implementations on the forum.