Computer.hdl question

[FuryA]

HI, I am working on the computer.hdl and when I testing it, the Hardware Simulator shows "No such built-in chip used: ARegester", How could I solve this, by the way, I do not implement CPU.hdl yet.

[cadet1620]

You can not test Computer.hdl until you have written and tested CPU.hdl and Memory.hdl, because it uses both of these parts in its implementation.

--Mark

[FuryA]

HI, May I have a example about the implementation of CPU.hdl, I found some design pictures but still have no idea about it, My email is [e-mail], thx

[cadet1620]

The best way to start on the CPU is to print "Diagram 5.8: Proposed CPU implementation" in chapter 5 so that you can write notes on it, mark the wires/buses as you connect them, etc.

Write HDL for each of the parts in the diagram, and interconnections that are shown.

Generally you want to name wires/buses based on the output that creates them.  Fir the 'c' connections use a name based on the part's name or function. Be sure to connect the outputs on the right side of the diagram to their parts. Include comments in a complex circuit like CPU. It should look something like this.

// D register
DRegister(in=aluOut, load=dRegLoad, out=dRegOut);

// A register and its input multiplexor
Mux16(sel=aMuxSel, a=aluOut, b=instruction, out=aMuxOut);
ARegister(in=aMuxOut, load=aRegLoad, out=aRegOut, out=addressM);

// ALU and 'y' input multiplexor

The next thing that you need to do is to figure out where all the 'c' signals come from.

For example, when does 'aMuxSel' need to be true? That multiplexor routes the value from @ instructions to the A register, so it must be true whenever 'instruction' is an @ instruction.  What bit determines that?

When do you need to load the A register? @ instructions or C-instructions with the A destination bit set.

// Control logic
// A register
Not(in=instruction[___], out=aMuxSel);
...more logic...
Or(..., out=aRegLoad);

// D register
...
// ALU
...
// PC
...

--Mark