Confused about total memory allocation

[txxnano]

Greetings.

I've encountered an architectural doubt I'd like to understand in greater depth. I managed to get in place, and this is just for the sake of complete understanding. Once resolved, I can move ahead with Chapter 5

Hack computer architecture allows an addressable memory space of approximately 64KB (16-bit architecture). However, I've noticed that we've allocated only 2^15 addresses for both ROM and RAM.

1. Is this allocation strategy a deliberate design choice, or is it a characteristic inherent to this specific CPU architecture where ROM and RAM maintain a 1:1 address ratio? (e.g: 2^15 for RAM + 2^15 for ROM)
2. Why the decision of a 15-bit address bus and not a 16-bit one?
3. What are the actual memory specifications of the Hack (if possible to answer)?

Best regards

PS: sorry for the three-question post, but I assumed they were all related.

[WBahn]

In theory, you could access any amount of memory that you wanted to. The problem is how to implement doing so in an easy way.

How do you access ROM and RAM in the Hack?

You load the address you want to access into the A-register. You then either access the value coming in from the RAM (which ALWAYS uses the current contents of the A-register as the address), or you load the current contents of the A-register into the Program Counter.

But loading a value into the A-register directly involves the use of a A-type instruction, which is signified by the most-significant bit being a 0, which means that you can only load 15-bit values into it using an A-type instruction. This is where the 15-bit address limitation comes from.

You could certainly get any 16-bit value into the A-register, but it would require multiple steps because you would have to do some math or logical operations in order to construct it.

The actual memory specifications for the Hack's RAM are laid out in Fig 5.6 (2nd Edition) -- Fig 5.7 in the 1st Edition. There is 16 kW of general purpose RAM at the bottom of the address space, followed by 8 kW of memory-mapped memory of the screen, followed by 1 word of memory for the keyboard interface. The remaining (8 kW - 1 word) is not implemented.

The ROM layout is simpler -- it merely consists of 32 kW.

So the next question you might ask is: How could the Hack address more than 64 kW of memory?

There are a few ways. One is to add a second address register and use it's output to control additional address lines. These bits essentially select "banks" or "pages" of memory. Many microcontrollers, especially 8-bit ones, use this strategy. The hardware design is pretty straightforward, but writing software to successfully use this more complicated arrangement is, well, more complicated. So the authors chose to not go there, given the already huge scope of the project.

[txxnano]

Thank you for your response.

It's great to hear firsthand and gain a deeper understanding of the why of a few project decisions. I'll try to this put this knowledge in practice as soon as possible.