Thanks for that information.
After doing more research, I'm reporting these conclusions.
Please let me know if I'm wrong on anything, or any comments.
My status: completed RAM8
1. Positive-Negative
Commercial D Flip flops are available with positive edge trigger type.
But play-hookey.com ignores that option. No problem.
This comment is made on the first (The RS Flip-Flop) in the series:
"Therefore, the Q and Q' outputs can only change state when the CLK signal falls from a logic 1 to logic 0.
This is known as the falling edge of the CLK signal; hence the designation edge-triggered flip-flop."
http://www.play-hookey.com/digital/sequential/rs_nand_flip-flop.htmlBut the term "edge-triggered flip-flop" can also refer to those that change state when CLK rises from 0 to 1.
On their D Flip-Flop, when CLK goes from 1 to 0, Q changes to D, indicating a falling (negative) edge.
http://www.play-hookey.com/digital/sequential/d_nand_flip-flop.htmlTry it:
A. Reload page so CLK, D, and Q are 0. Press CLK many times, output does not change (no surprise).
B. Reload page. Press D to 1. Press CLK to 1; Q=0. Press CLK to 0; Q=1. Press CLK many times, no change.
C. Reload page. Press CLK to 1; Press D to 1. Q=0. Press CLK to 0; Q=1. " "
Example C shows: Even if D is set to 1 after CLK is 1, Q changes to 1 when CLK goes to 0.
On one web site, the symbol for a falling edge DFF has a small circle on outside of DFF (touching the clock triangle).
In Logisim, the DFF symbol does not have that circle, but it operates as falling edge.
I made a Logisim D Flip-Flop as shown in play-hookey.com; it behaves in the same way.
And apparently Hardware Simulator is negative also.
Are there any advantages of either - positive or negative?
2. How does CLK on these diagrams relate to the "tick" and "tock" of Hardware Simulator?
Evidently "tock, output;" represents the out status after CLK goes from 1 to 0.
That's the important clock event.
As shown above in Example C, all the time before clock goes to 0 is available for input changes.
Even after setting CLK to 1, D can be changed and recognized.
However, IMO, HardwareSimulator "tick, output;" represents an arbitrary cutoff time, after which input changes are not recognized.
In these lines:
tick, output;
set load 1,
set in 0,
tock, output;
the input changes set after tick, output; are not recognized when CLK goes to 0 ("tock, output;").
3. It's misleading to say we set an input at time t+ (tick) or at time t (tock), such as:
cadet1620 wrote
When we set an input at time t (tock).
Technically, as you have stated, "What's important is to understand that the clock is a periodic event."
That is, tick and tock are events. In a negative system, tock is the important event.
Isn't it more accurate to say we can set input Before tick or Before tock events?
When playing with D Flip Flop (8 Nands, IN: D and CLK, OUT: Q and Q'), I can change D many times in a time period.
But when I finally press CLK 1 to 0 (clock event), whatever is in D goes to Q.
Getting back to Figure 3.5, the clock row represents the oscillating clock signals.
In order to get a negative edge, the electronics must go positive first.
But in a negative edge system, when it goes positive is not really important.
Combinational changes can be made generally before or after the positive edge, recognizing certain "margins".
But in Hardware Simulator, "tick, output;" is a programming point at which all the input is edited and recognized for tock.
This artificial separation is not seen in interactive diagrams such as play-hookey or Logisim.
This is not a problem with HS; we only need to set inputs before tick.
George