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As for efficiency, in hardware those gates are already there, so having them perform alternate computations and then picking the one you want is quite reasonable. There are better ways than using Muxes for several of those operations, but for the N2T purposes those kind of gate level optimizations are off the table because of starting with only Nand gates to build everything with.
If you wanted to go for maximum speed, you would have sixteen pairs of And16 and Add16 gates, each being fed with one possible hard-coded choice of zx, nx, zr, nr, giving you thirty-two outputs. You would double that by adding the negated version of each. That would give youi 64 possible outputs and you would use your 6 control inputs to control a 64:1 Mux to choose the one you wanted. These are the types of things that are actually done when you want something to run as fast as possible and are willing to buy the silicon real estate to do it.
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