FullAdder imp.

[ysh443]

Hi
im trying to implement the FuallAdder usind two H.A.
when adding the C bit using a H.A. , i conclude that the carry_out
is not important so i want to leave it unwired

but the Hardware simulator is crying that its the carry output
shoul be connected

how can i cause it be unconnected?

regards

[cadet1620]

[Edit: fix typo.]

ysh443 wrote

Hi
im trying to implement the FuallAdder usind two H.A.
when adding the C bit using a H.A. , i conclude that the carry_out
is not important so i want to leave it unwired

but the Hardware simulator is crying that its the carry output
shoul be connected

how can i cause it be unconnected?

regards

You do need to do something with the carry outputs from both half adders to make a correct full adder. Consider adding a=0, b=1 and c=1.

The first half adder produces sum₁=1, carry₁=0.
The second half adder adds sum₁ and c producing sum₂=0, carry₂=1.

sum₂ is the sum output from the full adder. carry₁ and carry₂ need to be combined in some fashion to produce the full adder's carry output.

It is OK to leave out the connection to an unused output in a part line. For instance the full adder for bit 15 in your Add16 won't have its carry connected so you can write:     FullAdder(a=a[15], b=b[15], c=c14, sum=out[15]);

--Mark

[pLaQNo1]

cadet1620 wrote

The second half adder adds carry₁ and c producing sum₂=0, carry₂=1.
<p>
sum₂ is the sum output from the full adder. carry₁ and carry₂ need to be combined in some fashion to produce the full adder's carry output.
<p>
--Mark

I think you made a typo.
Shouldn't you add sum1 and c to get the final sum?

[cadet1620]

pLaQNo1 wrote

I think you made a typo.
Shouldn't you add sum1 and c to get the final sum?

Thanks for catching that. I corrected the original reply.

--Mark

[notzy]

Hey there, I don't understand how we can logically deduce that an Or gate is needed to connect the two carries.

This is the truth table, but I have no clue why this connects the two HalfAdder and the output carry. Can somebody explain?

 c1 | c2 | Or 
 0  | 0  | 0
 0  | 1  | 1
 1  | 0  | 1
 1  | 1  | 1

[WBahn]

Consider the possibilities:

when performing C = A + B + carry_in where A and B are two one-bit inputs and C is a two bit output (C_carry, C_sum) you are just adding three bits together, right.

So consider the possibilities. You use a half-adder to add any two of the bits (let's say A and B).

This produces a two-bit partial result consisting of a sum and a carry. How many possible results are there? Only three! You can't add two bits together and get 11. So we don't have to consider this case at all.

Now you want to add another bit to this result using another half adder.

How would you do it by hand and what are the possibilities?

With Cin = 0
A+B   : 00 01 10
+Cin  :  0  0  0
result: 00 01 10

With Cin = 1
A+B   : 00 01 10
+Cin  :  1  1  1
result: 01 10 11

Notice that there are three cases where the Cout bit is a 1. In the first case, it is because of the Carry from adding A+B.

In the second case it is because of the Carry from (A+B)+Cin.

In the third, it is again because of the Carry from (A+B).

In no case what there a Carry from either of these operations but in which we wanted the Cout to be anything other than zero.

So the Cout bit is a 1 whenever there is a Carry from EITHER of the two half-add operations.

[notzy]

Thanks for your fast reply. I have to admit that I don't fully understand your explanation, especially this sentence:

WBahn wrote

In no case what there a Carry from either of these operations but in which we wanted the Cout to be anything other than zero.

Can you reformulate that?

WBahn wrote

So the Cout bit is a 1 whenever there is a Carry from EITHER of the two half-add operations.

If this is the conclusion, shouldn't it be a Xor gate instead of Or?

[WBahn]

notzy wrote

Thanks for your fast reply. I have to admit that I don't fully understand your explanation, especially this sentence:

WBahn wrote

In no case what there a Carry from either of these operations but in which we wanted the Cout to be anything other than zero.

Can you reformulate that?

Sure. We need to come up with logic that not only gives us a 1 when we need a 1, but also that does NOT give us a 1 when we need a 0.

If there were times that one of the half-adders produced a carries but that we needed the full-adder to produce a 0, then we couldn't use the Or of the carries from the two half-adders as our carry from the full adder.

notzy wrote

WBahn wrote

So the Cout bit is a 1 whenever there is a Carry from EITHER of the two half-add operations.

If this is the conclusion, shouldn't it be a Xor gate instead of Or?

In this case it doesn't matter.

It comes down to what we need to happen when BOTH half-adders produce a carry. It's a non-issue because it can't ever happen. So we don't care what our full-adder's carry would be in that situation and we can choose either an Or or an Xor. Since the Or is the smaller, faster logic (something that doesn't matter for this course), we would opt for it.