Got stuck in CPU.hdl. What is your mental model of figuring out?

[ajksdf]

I just got stuck in the beginning of implementing the CPU.hdl. For what the lecturer said, I know most of the control bits come from the instructions. I may need to use the following format: instruction[X] to get the specific bits.

Besides, for the input in ALU. I have re-watched the lecture a few times but still cannot get the clue of the order of those 6 bit of control bit should be. Any hints?

I placed all the gate I need in my HDL and I just stuck here. For those who can successfully do the exercise. How do you come up with your solution? What is the mental model you have adopted?

Thank you in advance.

[WBahn]

For the instruction to ALU mapping, compare the state of the control bits needed by the ALU for each operation it supports to the state of the instruction bits for those same operations. Notice a glaring pattern?

Break the problem down into pieces. The authors give you the CPU data path, you just need to figure out how to derive the control signals from the instructions. Which parts of the data path play any role in whether the next instruction executed is the next instruction in memory or if a jump is taken. When bits in the instruction determine this? Solve that problem. The consider which part of the data path plays a role in routing the output of the ALU to each possible destination (A, D, or M) and which instruction bits control that. Solve that part of the problem.

[ajksdf]

I have marked down the clues given in the lecture. And try to put all of the information into my HDL but it just doesn't seem to work.

When I check the answer and feel confused why can they come up with using specific gate.

[WBahn]

I don't understand some of your annotations on your diagram. You seem to be hard coding many of the control signals to either a 0 or a 1. Why?

Let's pick one of the control signals and see if we can come up with the logic for it. How about writeM?

Can you explain, in words, when the writeM signal should be asserted (i.e., HI)? Be sure to consider both types of instructions (a-type and c-type).

[ajksdf]

//... seem to be hard coding many of the control signals to either a 0 or a 1. Why?
- I just draw this when I was watching the project overview.



//Can you explain, in words, when the writeM signal should be asserted (i.e., HI)? Be sure to consider both types of instructions (a-type and c-type).
- 1. use 1 NOT gate to get the instruction type Not(=instruction[15], out=aOrC)
- 2. since one of those 3 destination bits decide whether the A / M / D register will receive the information. I think an And gate should be chosen. For the other bit, instruction type bit may come into play so I come up with the following gate.  
        And(a=instruction[15], b=instruction[4], out=writeM)

[WBahn]

<quote author="ajksdf">
//... seem to be hard coding many of the control signals to either a 0 or a 1. Why?
- I just draw this when I was watching the project overview.
<quote>

So it sounds like it was walking through a specific example.

//Can you explain, in words, when the writeM signal should be asserted (i.e., HI)? Be sure to consider both types of instructions (a-type and c-type).
- 1. use 1 NOT gate to get the instruction type Not(=instruction[15], out=aOrC)
- 2. since one of those 3 destination bits decide whether the A / M / D register will receive the information. I think an And gate should be chosen. For the other bit, instruction type bit may come into play so I come up with the following gate.  
        And(a=instruction[15], b=instruction[4], out=writeM)

So what is the relevance of your Not gate? You don't use it to generate writeM.

By "in words" I'm trying to get you to first think about the logical objective and not about the details of how you plan to implement it.

For instance: The writeM line should be HI only when we have a C-type instruction that includes M as one of the destinations.

So now we have a very clear path to convert this to a logical expression:

writeM = (is a C-type instruction) AND (M is one of the destinations)

writeM = (instruction[15] is HI) AND (instruction[?] is HI)

Look carefully at which instruction bit targets the RAM.


 

[ajksdf]

From the video, I know the instruction[3] represent the data should write on memory. I think this is relatively easier because the implementation logic is being mentioned in the question description and the video.

However for the other parts of the CPU, it seems little information. I have also read the book. Found some possibly useful information. Just not yet figure out how to glue things tgt.

[WBahn]

ajksdf wrote

From the video, I know the instruction[3] represent the data should write on memory. I think this is relatively easier because the implementation logic is being mentioned in the question description and the video.

In your prior post you had instruction[4]. May have just been a typo, but make sure that you have it right in your code.

However for the other parts of the CPU, it seems little information. I have also read the book. Found some possibly useful information. Just not yet figure out how to glue things tgt.

So pick one of the other parts (not the ALU -- let's hold off on that for now, at some point you will hopefully see how simple that one is after you get the hang of things) and let's work that one. First, describe, in words, the conditions under which that control signal should be asserted.

[ajksdf]

Thank you for the tips. It seems the things get glued up after I have take a closer look on the ppt and the books. Thank you very much!!

[Lozminda]

Not knowing your circumstances; however I would very strongly recommend reading the book and not shipping any chapters unless you are much much cleverer than I am. (I'm not a computer scientist). I would have found it impossible to do the cpu without doing the previous 4 chapters or so, but then I'm a construction worker. Having said that I was able to do it. (It is actually a litlle bit easier than you think it is once you manage to get what the authors are driving at.)

Good luck

[Ty]

Thanks very much for posting this question, and for the answers that were given.  It really helped me focus more on the guidance that was given in the lectures.  Huge help