Help with Dmux

[nemesis312]

CHIP DMux {
    IN in, sel;
    OUT a, b;

    PARTS:
    Not(in=sel, out=notsel);
        And(a=in, b=in, out=a);
       
   
}

Comparison failure at line 5

[cadet1620]

First step in debugging: Do you have all the outputs connected?

--Mark

[nemesis312]

all is in the Folder Project 1

Im new with this, but my professor don't teach us

[nemesis312]

here is the script!

load DMux.hdl,
output-file DMux.out,
compare-to DMux.cmp,
output-list in%B3.1.3 sel%B3.1.3 a%B3.1.3 b%B3.1.3;

set in 0,
set sel 0,
eval,
output;

set sel 1,
eval,
output;

set in 1,
set sel 0,
eval,
output;

set sel 1,
eval,
output;

[cadet1620]

You don't need to post the test script; everyone has them.

The problem is with your HDL. The HDL for DMux says
    OUT a, b;
There are two outputs from the DMux; you need to have the output from some part connected to 'a' and the output from another part connected to 'b'.

You only have 'a' connected.

--Mark

[nemesis312]

thats is the problem i write a lots of codes and i only get is an error

[cadet1620]

With the code in your original post, I get error in line 4, not 5.

When you get a failure you need to look at View>Output and View>Compare and see what's different and figure out why.

Your part produces Output; the correct values are Compare.

In this case, Output line 4 is
    |   1   |   0   |   0   |   0   |
and Compare line 4 is
    |   1   |   0   |   1   |   0   |
so when 'in'=1 and sel='0', your 'a' is 0 when it should be 1.

You need to figure out why.

It will help to write separate truth tables for the 'a' and 'b' outputs. Then you can use canonical form to derive equations for each output individually.

--Mark

[nemesis312]

my error is in the line 5 now

original out is
| 1 | 1 | 0 | 1 |

and i got
| 1 | 1 | 1  | 0 |

[cadet1620]

I cannot coach you for every error you get.  Work at figuring this out yourself.

Another useful resource is Logisim
    http://ozark.hendrix.edu/~burch/logisim/
which lets you create circuits visually. You will still need to convert the resulting circuit to HDL yourself.

--Mark

[Manu T.]

The problem is your understandment of the implementation of the Demultiplexor gate.

[Explicit implementation of Mux deleted by admin. Please don't post solutions to the forum.]

°<| is my symbol for Not

What you did is that:

in --¦-------°<|--- notsel
      |          ____
      |_____|AND |
      |_____|____|-- a (out)

That makes no sense at all, maybe you should read the book from the beginning. Don't feel offended, but that is my suggestion for you.