Help with the CPU

[ImmaLemonnyyy]

Hey, for the past weeks (I know that's a lot but I did have a long break from the course) I've been trying to build the CPU. I am really starting to give up. I've even looked in others projects but I just can't put my hands on what I am doing wrong. I am pretty sure the problem is with the delay between the Instruction and the ALU output although I think it shouldn't be that way, but when I looked in others ways of building the CPU they used the same strategy of mine. I tried doing some graphs and I think I see where is the problem that I can't fix but in others codes it just works and I don't know why.

Here is my code:
CPU.hdl

Try to focus more about the ALU and the Registers part and less about the Jumping one when helping.

Thank u a lot.

[WBahn]

How is it failing?

Look at the .out file (this is the file that records the output of your design) and compare that to the .cmp file (this is the file that was recorded running the same tests on the authors' reference design).

The last line in the .out file is the one that failed. Look at how it is different than the corresponding line in the .cmp file. Then examine in the inputs for that test case and see if you understand why the .cmp file outputs are correct, and then see if you can determine why your design output what it did. After that, it's usually pretty easy (not always, though) to figure out where your design is going astray.

If you still can't find it, post your .out file and we can look further.

[ImmaLemonnyyy]

Hey,
I think I know what is wrong with the design. The DRegister never gets updated because of a delay between the Instruction and the ALU output. Using the Instruction I command wether the register should be updated or not. But when it should by the Instruction the ALU output is in it's the previous one. I've tried everything to fix it but it just doesn't seem to work. Weird enough cause when I look in others code it just works for them doing the same thing as I did. Besides the delay seems to effect some other things.  
Thanks for trying to help, hope for a reply.  

[WBahn]

The only delay are delays as things go through registers. The simulator has no concept of propagation delay. All combinatorial paths have effectively zero delay.

Again, the best thing to do is to post the failed test.

Post your .out file and your .cmp file.

That will let us see EXACTLY which test and which specific values are not correct.

I am not going to go through your design hunting for what the problem might be when you have the information that will let me see exactly where to look.

[ImmaLemonnyyy]

Sorry for the late response, had some things going on.

Anyway, here's my .cmp and .out files. I didn't know how to send the files themselves so I captured them from the Hardware Simulator.

Hope u can still help me out with this.

.cmp 1: nand2tetris-proj5-cmp_file1.PNG
.cmp 2: nand2tetris-proj5-cmp_file2.PNG
.cmp 3: nand2tetris-proj5-cmp_file3.PNG

.out 1: nand2tetris-proj5-out_file1.PNG
.out 2: nand2tetris-proj5-out_file2.PNG
.out 3: nand2tetris-proj5-out_file3.PNG

[WBahn]

To attach a file click "More" on the tool bar and then select "Upload a file".

What line is the simulator saying failed to compare? The last line in the .out file appears to match the last line in the .cmp file.

[ImmaLemonnyyy]

I know how to upload a file, I don't know where to find the .cmp and .out files.

The failure is in line 12.

Edit: .cmp file: CPU.cmp
Can't send the .out one because it is not updated, all the details of the out are missing from time 1.

[WBahn]

Ah. The files are in the same directory that your .hdl and .tst files are in.

[WBahn]

I see you found the files.

The .cmp file actually doesn't do me much good, other than for convenience (and to ensure that I'm looking at YOUR .cmp file since it's always possible that they've been updated since my distro download). The .cmp files are supplied with the software download. What I really need is the .out file, as that is what your design produced.

Fortunately, looking at line 12 of the .png screen captures you provided earlier, shows the error (or at least the first error).

N2T_CPU_error.png

Counting down from the top of the file, line 12 is time 5+. As you can see, the value in the outM column is different. The .cmp file has 11111 while your .out has -1. So that is where you want to focus your attention.

You will probably need to look at the instructions before it to see what values are in the A and D registers.

[ImmaLemonnyyy]

Ok, thanks for that. But what instructions do u want me to look at?
Oh, and I think the reason of the difference is because the D Register never gets updated, (the delay I was telling u about) so when there is an ALU instruction involving the D Register's value the out is different.  

[WBahn]

The instructions are captured in the files as bit strings. If you look at the .tst file, they are also listed in the comments as mnemonics.

The first several are:

@12345
D=A
@23456
D=A-D
@1000
M=D
...

If you look at your files, you will see that the contents of the D register is the last entry on each line (you didn't capture it in your .png files). It is correct in the first few instructions, so there doesn't appear to be a delay in updating the D register. I can't tell if it is correct in line 12 or not since it wasn't included. But in calculating A-D you are getting a value of -1 going to the outM line.

[ImmaLemonnyyy]

Oh, that what u meant by looking at the instructions. Yeah I've been doing it actually but ill try again. R u sure the context of the D register is correct at first? I've been looking at the results but it doesn't seem to appear like so.

ill give more attention to the things u said tomorrow. Thx for helping me with all of that anyway.