The PC is like the Bit in structure, but instead of a DFF, it uses a Register for its storage element.
The difference is that instead of just a multiplexor selecting the next input value for the DFF, you need a more complex circuit that selects the next input value. The description tells you what the next input value needs to be based on the inc, load, and reset control signals.
Hint: "if" in the description is making a choice, which is what multiplexors do.
You might think that you need to do something special with the Register's load control signal, but think about this: what happens when you permanently connect a Register's load to true? The output follows the input delayed by one clock – it's working just like a DFF16 would work.