[I don't worry about including the implementation of Bit.hdl; it's exactly Fig. 3.1 translated to HDL.]
Thorvald wrote
Mux(a=outDFF, b=in, sel=load, out=inDFF);
DFF(in=inDFF, out=outDFF, out=out);
So what happens at the beginning is that it is evaluated the mux gate, but c'mon, we don't have an initial value in outDFF, so how is this value taken into account???
In the n2t hardware simulator, DFFs come up in state 0 at time t=0.
In the real world, when you apply power to a DFF it comes up in a valid state, either 0 or 1, but you do not know which. The hardware designer needs to guarantee that the circuit will be set to a known state by a 'reset' signal that occurs shortly after power-up.
For instance, you could add a reset to the DFF like this
Mux(a=outDFF, b=in, sel=load, out=next);
Not(in=reset, out=notReset);
And(a=notReset, b=next, out=inDFF);
DFF(in=inDFF, out=outDFF, out=out);
Usually, though, resets are handled at a higher level in the logic, as they are in the Hack computer's PC chip.
After that, it just go looping around this two gates, but how this is done? I mean, I would like to see a for or while loop to execute those gates a number of t-times, right?
It might help to think of sequential logic as an animated movie, rather than a software loop.
The paper starts blank.
The animator updates the scene based on the script (inputs and current state of the DFF).
Press the camera's shutter button to photograph the scene (clock tick updates DFF).
The animator updates...
If you want to look at what happens inside the DFF, visit
http://play-hookey.com/digital/sequential/d_nand_flip-flop.htmlYou can click on the D and CLK inputs.
There is lots of great information on this site.
--Mark