RAM64KD2 -the design with D2 to be designed with two address
decoder - row and column?
then what is the difference between this and RAM32KD1 - designs with D1 are to
be designed with single address decoder.
The difference is that the D1 version has one address input and one set of data lines while the D2 version has two address inputs and two sets of data lines. This is known as "dual-port" memory.
As for the implementation, first you need to decide if you want to be able to read/write with one address and just read with the other, or if you want to be able to read/write with them both. If the latter, you have to decide what happens if both addresses are the same and you are trying to use both to write.
Approach it hierarchically, just like the D1 version is done in the project. Start with a register that is compatible with dual port operations and build up from there.