I built the Hack computer on breadboards

[Tomer_Kronik]

Hi all,
After finishing the nand2tetris course 2.5 years ago, I decided to build the Hack computer using real hardware. I mostly used 74 series Logic ICs for that. I needed to make little modification for the CPU itself to use RAM with a single data bus (in/out).

I designed the VGA and keyboard controller, and a memory controller as well to allow CPU and IO to access the RAM.

Documentation link: https://hackaday.io/project/185131-the-hack-computer-from-nand2tetris-on-breadboards
Video link: https://youtu.be/L-azf9ecvfo



Tomer Kronik

[AndyPro720]

This is pretty insane man. Kudos!
If you haven't already, have a look at Ben Eater's breadboards computers and GPUs. You'll have a ton of fun.

On a side note, I would love to know how you went about implementing the whole thing on hardware. All details are appreciated!  xD

Cheers
Angaj

[Tomer_Kronik]

Thank you :)
I plan to share next week more info on this project. I will upload some explanations, pictures and schematics :)

[WBahn]

Beautiful workmanship! That thing better end up mounted on a wall someday.

Am very interested in the peripherals you designed for the keyboard and VGA controller.

[AndyPro720]

Don't forget to tag me xD

[Tomer_Kronik]

Published full documentation: https://hackaday.io/project/185131-the-hack-computer-from-nand2tetris-on-breadboards

[NotRandom]

After recently taking the course I think a 2.5 year timeline to be able to create this also seems reasonable for me - in a non-goal-orientated way. I have an FPGA, but having something like this seems like it would be more satisfying. In a certain sense. There are multiple things not in the course that would also take time to learn and figure out.

Just because this is a forum, and for a possibly useful perspective, these are my main problems.

Timing. Different IC chips have different delay times. How the delays are actually calculated isn't really known (and of course wasn't needed for the class). I was thinking/estimating a 1MHz timer would be plenty good enough (not sure of standard delay times though), this runs on a 2MHz timer, and a 3MHz timer is too fast. The included pong game could also be made with a frame limiter though.

Byte significance. The high and low bytes (?) or most and least significant bytes were not really covered in the class. Creating the RAM chips illustrates this the most. I was left wondering what's going on if it looks like I only have half the amount of RAM. Here it shows that the ROM is also split up in the same way. Which makes sense if it's a burnt RAM chip.

Memory map/controller. I don't know what the design is supposed to be. I'm not sure what kind of experiments should be done either. This CPU was modified, so it's hard to say what it's "supposed" to be.

My project is a "Hacked Workstation" on FPGA, with backward Hack compatibility mode.