|
Administrator
|
What is the signal controlling the righthand Mux?
You have part of the functionality right, or at least close, but also some fundamental problems.
First off, what is it you are trying to achieve? A 2-bit register, or a memory consisting of two 1-bit registers? These are different things.
Since you only have a single bit coming in and coming out, I'll assume that you are trying to make a memory consisting of two 1-bit registers.
Your flip-flop part in your schematic appears to have two outputs. One is labeled Q. The other doesn't appear to be labeled (I'm guessing that there are enable pins on the bottom and that those are what the 'en0' label is referring to).
If a DFF has two outputs, one is the Q and the other is Q' (the opposite of Q). If that's the case, then you are feeding the Q' back into the Mux input which will result in the contents of the DFF toggling when that path is selected.
Your 'LOAD' signal is being applied to both of the input Muxes, so they will either both use the feedback path or both take in the signal from their input paths. That's not what you want.
Note that you still haven't made a 1-bit register (the 'Bit' part). Do that. Then forget that the DFF part exists. Build the Register part using Bit parts. Then, once you have a Register part, forget the Bit part and use the Register part to build the next larger memory element.
You keep insisting on doing higher-order designs using parts all the way down to the DFF. Why?
If you are going to do that, why are you using a Mux or Not or And gate? Why aren't you using nothing but Nand and DFF parts?
The whole idea behind the project is to build up functionality one level at a time and to build each level on the functionality provided by the prior levels.
You are still getting ahead of yourself.
Make a 1-bit register that behaves the way that a 1-bit register is supposed to behave. There is NO point trying to go beyond that until you have a correctly functioning 1-bit register.
|
Locked
