Last 4 Mulit-way Mulit-bit gates

[ouverson]

I'm under the impression that sub-busing is the linchpin to understanding how to tackle multi-way, multi-bit gates: such as Mux4Way16.

I started playing with an implementation that piped the output of one Mux16 into another Mux16, similarly to how I implemented the Or8Way; however, that brought to the surface another challenge: how to manage sel[2]. Even if I pipe the output of one Mux16 into another I still have to manage sel[0] and sel[1]. At that point the arrangement of Mux16s got all arbitrary, and I felt this was a dead-end.

Please help me understand how to leverage sub-busing to solve implementation. If it's not about sub-busing please point me to the correct topics, concepts, techniques, etc.

Thank you.

P.S.

In the "HDL Survival Guide", under section "Bit Numbering and Bus Syntax":

"Hardware bits are numbered from right to left, starting with 0. When a bus is carrying a number, bit n is the bit with weight 2n. (2 to the nth power)

For example, when the book says sel=110, it means that a bus named sel receives the inputs 110. That means sel[2]=1, sel[1]=1 and sel[0]=0"

Not sure what the highlighted text means. I'm trying to map the sentence with the example that follows and don't see the connection.

[WBahn]

The key to the highlighted sentence is that it is referring specifically to cases where a bus is carrying a number. For instance, the output from the ALU after doing an addition operation. So say that the bits on the bus happen to be

0000 0101 1010 1111

Note that the spaces are there just to make things more readable for us humans.

Which of those bits is the least significant and which is the most? That sentence is simply telling you that the left bit is the most significant and the right bit is the least significant. Remember that, as far as the hardware is concerned, these are just sixteen different bits on sixteen different wires, we need to understand how to determine what value that pattern of sixteen bits represents. So number from right to left starting with 0 and ending with 15. Then the weight of a given bit is just 2^(bit position number). You then multiply each bit in the pattern (either a 0 or a 1) by the weight for that position and add up the results.

[ouverson]

Thank you WBan.

You did a nice job answering the P.S. but the post really had to do with my being struck on multi-way, multi-bit gates.

I reposted (minus the P.S.) to sub-forum Chapter 1: http://nand2tetris-questions-and-answers-forum.32033.n3.nabble.com/Last-4-Mulit-way-Mulit-bit-gates-td4033150.html

I know it's not good to post in 2 locations, so I'm going to delete this post; unless you can rename the post to something like "Bit Numbering and Bus Syntax question"? Then I can remove the copy above P.S. and dedicate the post to the question of bit positioning, etc.