Memory Mapped I/O Misunderstanding

[Andreas]

Hi,

I have read about memory mapped I/O several times in the book, but for some reason I can't seem to understand it. During reading about it I came up with two forms of how it works:

At first I thought memory mapped I/O was RAM, but split between "system memory" and I/O memory. Thus, if I were to purchase 4GB of RAM for my PC, 1GB, say, would be already given to I/O devices. Either that or the amount of memory given to I/O devices would be determined by the I/O devices themselves who would say "I need 1.2GB of memory to function correctly". However, I doubted this is the case since this would be very complicated in the case that the I/O device wanted more memory than was available. Also if it only left the system with 50MB of memory there would constant memory handling techniques applied which would negatively impact performance.

Then I understood memory mapped I/O as the computer's memory being made up of RAM and registers provided by I/O devices. Therefore if I were to purchase a computer with 4GB of RAM, and plugged I/O devices into the computer which need 1GB of memory in total to function correctly, my computer would have 5GB of memory. However, if this were the case, there would be issues with the machine instructions which may not be able to reference those addresses, if for example the instruction length were 16-bits. Thus there must be a limit put in place by the CPU.

So basically I am not clear on memory mapped I/O and would really appreciate it being explained to me.

Thanks

[cadet1620]

The memory address range used for I/O is usually fixed by the hardware design. For instance, 32-bit addresses can access 4GB. The microcomputer I'm using in my current project divvies up this space as (hexadecimal addresses)

00xxxxxx    EEPROM for program
01xxxxxx    on-chip RAM
02xxxxxx    external RAM
...             up to the hardware designer to use as needed
FFFFxxxx    on-chip I/O devices

In the case of 32-bit PCs, the I/O addresses are the top 1GB, so this is why you only see 3GB of RAM even if you put 4GB in your PC. (My laptop as 4GB RAM because it was cheaper to by 2x2GB than 2GB+1GB, go figure.)

The distinction "memory mapped" for I/O is mostly historical at this point. Older computers had separate IN and OUT instructions to do I/O, and that was referred to as "I/O".

--Mark

[Andreas]

So if there's a fixed amount of space allocated for I/O, how do different I/O devices not conflict with eachother? Are all input/output ports on the computer, eg. USB ports, etc. equally divided against the (say) 1GB of I/O space allocated in memory? Is this an OS issue?

Also, if the I/O devices use the RAM, why does the book suggest to us that it is the I/O devices themselves which contain registers? This is suggested by having us use the Screen and Keyboard chips which themselves contain registers, alongside our RAM chip. Rather, we should have used a 32K RAM chip and assume the Screen and Keyboard chips would take care of themselves.

[cadet1620]

The amount of address space is generally vast compared to the needs of the I/O devices. When the system is designed small sub-ranges are allocated for the possible devices. For example, an IBM XT could support up to 4 serial I/O cards plugged into its card slots. There were four groups of 16 addresses that were assigned for serial I/O cards. Each card had jumpers or switches that needed to be set so that it would respond to the correct sub-range.

Usually, the only I/O device that has large amounts of RAM on it is the graphics display. For 24-bit RGB that's 3 bytes per pixel x 1280 x 1024 = 3.75MB (for my current display mode). Other devices present the data from their registers on the data bus when their address is read, or store the value on the data bus into their registers when their address is written.

For the HACK computer, memory addresses
0..16K-1	read and write from the RAM16K chip,
16K..24K-1	read and write from Screen chip addresses 0..8K-1, respectively,
24K	reads from the Keyboard chip.
24K+1.. 64K-1	undefined what will happen (I.e., "don't try this at home, kids!")

--Mark

[Andreas]

So the I/O devices themselves have registers on them and these are mapped to the RAM registers? Thus, if you have a 32-bit system with 4GB RAM, 1 GB of that RAM (say) will instead point to the registers in the I/O devices? If I have understood correctly, is this a direct mapping or is it through pointers, thus:
Direct mapping: the address output by the CPU goes directly to the I/O device's registers (as with the Hack computer), and the 1GB of the RAM (stated previously) is just ignored as though it doesn't exist.
Pointers: the address output by the CPU goes to the RAM (in the 1GB area), which then re-directs it to the I/O device's registers.

[cadet1620]

Andreas wrote

Direct mapping: the address output by the CPU goes directly to the I/O device's registers (as with the Hack computer), and the 1GB of the RAM (stated previously) is just ignored as though it doesn't exist.

Basically, it's this case.  The memory subsystem is separate from the I/O subsystem.  There is usually another piece of hardware in the computer called a DMA (Direct Memory Access) controlled that can be set up so that I/O devices that ship lots of data, like Ethernet for example, can bypass the CPU and read and write data directly into RAM.

The overpopulated RAM in the memory subsystem is sort of like a 4-car subway train pulling into a station only long enough for 3 cars -- hope there's nobody on the fourth car that needs to get off!

--Mark

[Andreas]

So (continuing with the example) why do we waste 1GB of RAM and instead have the I/O devices themselves contain registers? Rather, we should always read and write to RAM, and have the I/O devices poll their specified locations. I suppose the only problem with this would be if you have a very small amount of RAM (less than or equal to the total amount of I/O memory needed), since there would be no way to communicate with I/O without disturbing the rest of the system. We could however enforce a minimum amount of RAM needed for the system to function correctly.

[cadet1620]

Andreas wrote

So (continuing with the example) why do we waste 1GB of RAM and instead have the I/O devices themselves contain registers? Rather, we should always read and write to RAM, and have the I/O devices poll their specified locations.

Speed and hardware complexity. Writing data to RAM and reading it back out takes at least twice as long. Writing directly to an I/O register will only take a handful of logic to decode the register's address; having the I/O device initiate a memory read cycle to get the value so that it can put it into its internal register requires a rather complex state machine.

--Mark

[Andreas]

Thanks Mark for the replies. I think I understand it now.