Hello i made this circuit for my Mux4Way16 gate and i tried to write it on HDL but it doesn't work i have an error which says "sub bus of an internal pin might not be used".
Here is the circuit :

And here is my code :
CHIP Mux4Way16 {
IN a[16], b[16], c[16], d[16], sel[2];
OUT out[16];
PARTS:
And(a=sel[0], b=sel[1], out=sel0Andsel1);
Not(in=sel[1], out=Notsel1);
And(a=sel[0], b=Notsel1, out=sel0AndNotsel1);
Mux16(a=a, b=b, sel=sel0AndNotsel1, out=Muxab);
Mux16(a=c, b=d, sel=sel0Andsel1, out=Muxcd);
And(a=Muxcd[0], b=sel[1], out=Muxcd0Andsel1);
And(a=Muxcd[1], b=sel[1], out=Muxcd1Andsel1);
And(a=Muxcd[2], b=sel[1], out=Muxcd2Andsel1);
And(a=Muxcd[3], b=sel[1], out=Muxcd3Andsel1);
And(a=Muxcd[4], b=sel[1], out=Muxcd4Andsel1);
And(a=Muxcd[5], b=sel[1], out=Muxcd5Andsel1);
And(a=Muxcd[6], b=sel[1], out=Muxcd6Andsel1);
And(a=Muxcd[7], b=sel[1], out=Muxcd7Andsel1);
And(a=Muxcd[8], b=sel[1], out=Muxcd8Andsel1);
And(a=Muxcd[9], b=sel[1], out=Muxcd9Andsel1);
And(a=Muxcd[10], b=sel[1], out=Muxcd10Andsel1);
And(a=Muxcd[11], b=sel[1], out=Muxcd11Andsel1);
And(a=Muxcd[12], b=sel[1], out=Muxcd12Andsel1);
And(a=Muxcd[13], b=sel[1], out=Muxcd13Andsel1);
And(a=Muxcd[14], b=sel[1], out=Muxcd14Andsel1);
And(a=Muxcd[15], b=sel[1], out=Muxcd15Andsel1);
Or(a=Muxab[0], b=Muxcd0Andsel1, out=out[0]);
Or(a=Muxab[1], b=Muxcd1Andsel1, out=out[1]);
Or(a=Muxab[2], b=Muxcd2Andsel1, out=out[2]);
Or(a=Muxab[3], b=Muxcd3Andsel1, out=out[3]);
Or(a=Muxab[4], b=Muxcd4Andsel1, out=out[4]);
Or(a=Muxab[5], b=Muxcd5Andsel1, out=out[5]);
Or(a=Muxab[6], b=Muxcd6Andsel1, out=out[6]);
Or(a=Muxab[7], b=Muxcd7Andsel1, out=out[7]);
Or(a=Muxab[8], b=Muxcd8Andsel1, out=out[8]);
Or(a=Muxab[9], b=Muxcd9Andsel1, out=out[9]);
Or(a=Muxab[10], b=Muxcd10Andsel1, out=out[10]);
Or(a=Muxab[11], b=Muxcd11Andsel1, out=out[11]);
Or(a=Muxab[12], b=Muxcd12Andsel1, out=out[12]);
Or(a=Muxab[13], b=Muxcd13Andsel1, out=out[13]);
Or(a=Muxab[14], b=Muxcd14Andsel1, out=out[14]);
Or(a=Muxab[15], b=Muxcd15Andsel1, out=out[15]);
}