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Ok...so I am back, have been missing for about 6 months, and was wondering something...When I first started this project I actually figured out how to implement the Nand gate...now that I have come back it seems as if I can't remember but if I remember correctly is it going to go something like this:
CHIP Nand{
IN a, b;
OUT out;
PARTS:
Nand(...);
Nand(...);
Nand(...);
Nand(...);
Also, in the notes I have read that there is no need in implementing the Nand gate...is this true??
Thanx,
Richard
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