On the right track? Memory HDL

[throwaway]

I derived the following for my truth table:
addr[14]   addr[13]  load    out
        0           0      0     RAM(t)
        0           1      0     RAM(t)
        1           0      0     SCR(t)
        1           1      0     KBD(t)
        0           0      1     RAM(t-1)
        0           1      1     RAM(t-1)
        1           0      1     SCR(t-1)
        1           1      1     KBD(t)

Which is what a Mux8Way16 would do (I love those things).

A concern of mine and probably cleared up somewhere in the text: the Memory.cmp and Memory.tst will only set 'load' in pairs.  I'm planning to use a DFF/Bit and Register to hold (t-1) values.  If the load bit were set for only one full clock and the address changes on the next full clock, then there could possibly be an address error.  As I haven't implemented the other chips, I'm not sure that this situation is going to come up or not, and the pair-testing seems to indicate that it isn't a concern.  Is that a fair assumption?

[cadet1620]

load does not directly affect the output value of the Memory chip. When needed, it gets passed to the components that make up the Memory that need a load input.

Memory's similar to the larger RAMs in concept, except that the internal parts aren't all smaller RAMs.

--Mark

[throwaway]

cadet1620 wrote

load does not directly affect the output value of the Memory chip. When needed, it gets passed to the components that make up the Memory that need a load input.

Memory's similar to the larger RAMs in concept, except that the internal parts aren't all smaller RAMs.

--Mark

My initial understanding was due not paying attention to the tick/output/tock lines in the .tst file.  In the past the line numbers would be next to the compare and output such as
1
1+
2
2+
...

I managed to "hack" it for lack of a better word, under the test conditions. I'll study the successful code and see if I can grok it.  

Edit to add:  Nope, still not it.  Manual testing doesn't hold up under scrutiny.  BTTDB

[throwaway]

OK, never mind all this, I was making it out to be way harder than it was, as I am wont to do!  Bad habit.

throwaway wrote

cadet1620 wrote

load does not directly affect the output value of the Memory chip. When needed, it gets passed to the components that make up the Memory that need a load input.

Memory's similar to the larger RAMs in concept, except that the internal parts aren't all smaller RAMs.

--Mark

My initial understanding was due not paying attention to the tick/output/tock lines in the .tst file.  In the past the line numbers would be next to the compare and output such as
1
1+
2
2+
...

I managed to "hack" it for lack of a better word, under the test conditions. I'll study the successful code and see if I can grok it.  

Edit to add:  Nope, still not it.  Manual testing doesn't hold up under scrutiny.  BTTDB