PC.Hdl

[MrMufa]

Jack, could you by any chance share your PC chip on Logisim? I am a bit confused by it. Would be greatly appreciated.

[Jack Draak]

By all means... Do you mean the data file itself? Or just this?

Spoiler Warning: While this doesn't seem to be the 'customary' solution, it works for me. Don't peek if you don't want a spoiler. I'm happy to remove it if requested, but it was asked for.....

Offsite image of working PC circuit

Thanks (Mark) for the info in the prior post.  While I'm coming to understand that there are different ways to attain efficiency, one of my side-goals at present is attempting to minimize the # of transistors I'm deploying, which is why I went for the custom Or3Way vs the existing Or8Way in the PC chip.

[cadet1620]

[You might want to move your logisim circuit to pastebin, like you did in your earlier post with your HDL, so that the spoiler is hidden.]

It is better not to spend too much time worrying about gate/transistor count. It is more important to develop and use higher level abstractions

Also, Nand-based counting does not reflect the modern (CMOS) world too well. For instance, a transmission gate based Mux requires 6 transistors, while a Nand based Mux requires 14:

    

There are also optimized circuits for things like Xor, and it is possible to make many other combinations of gates using a small number of transistors.  Here is an And-Or-Invert gate (computes Not((a b) + (c d)) ):

    

--Mark