Problem with zr and ng

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Problem with zr and ng

cygnus
Hi,

I've been trying to implement ALU and is stuck upon zr and ng.

Here's the code I used. ores is equivalent to f(x,y) and 16 bit wide.

    Not(in=ores[15], out=ngc);
    Not(in=ngc, out=ng);
   
    Or8Way(in=ores[0..7], out=fh);
    Or8Way(in=ores[8..15], out=sh);
    Or(a=fh, b=sh, out=orOut);
    Not(in=orOut, out=zr);

Hardware Simulator doesnt load the code.
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Re: Problem with zr and ng

cadet1620
Administrator
You cannot use [] on internal buses.  You need to create multiple internal buses that have the data you require at their source.

Somewhere in your HDL you have
    Somechip(..., out=ores);
That's where you need to break apart the output bus.
    Somechip(..., out[0..7]=ores_low8, out[8..15]=ores_high8, ...);
You can hook an unlimited number of wires and buses to a part's outputs.

--Mark
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Re: Problem with zr and ng

jsank
i'm a little confused b/c it seems that in another part of the forum, the solution using [] is correct:

the thread at the link below seems to say that the solution further below is correct (and roughly matches what i came up with) but the HDL throws the 'sub bus of internal node may not be used' error

is there a step previous to this?

also, physically, i don't understand why 8 pins of a 16 bit bus couldn't be connected to an Or8Way chip while the other 8 pins are connected to another Or8Way chip but i'm sure i'm totally missing something.

http://questions-and-answers-forum.32033.n3.nabble.com/Figuring-out-zr-td2326310.html

Or8Way(in=outValue[0..7], out=firstPartOr);
Or8Way(in=outValue[8..15], out=secondPartOr);
Or(a=firstPartOr, b=secondPartOr, out=orOut);
Not(in=orOut, out=zr);

THANKS!
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Re: Problem with zr and ng

cadet1620
Administrator
jsank wrote
i'm a little confused b/c it seems that in another part of the forum, the solution using [] is correct:

the thread at the link below seems to say that the solution further below is correct (and roughly matches what i came up with) but the HDL throws the 'sub bus of internal node may not be used' error
The quoted snippet of HDL is invalid unless outValue is an INPUT or OUTPUT of the chip being defined.  It is a limitation of the hardware simulator that sub-busing can only be done on inputs and outputs of chips.
    Not(in=in[3], ...);   is sub-busing the in bus of the chip being defined,
    Not16(out[4..6]=threeBits, ...);   is sub-busing Not16's output.
also, physically, i don't understand why 8 pins of a 16 bit bus couldn't be connected to an Or8Way chip while the other 8 pins are connected to another Or8Way chip but i'm sure i'm totally missing something.
No physical reason, just a programming limitation in the Hardware Simulator.

--Mark
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Re: Problem with zr and ng

jsank
thanks Mark - i got it all working!