Problems understanding the Clock, Flip-Flops and Registers as explained in the book.

[jb]

CONTENTS DELETED

The author has deleted this message.

[cadet1620]

out(t) and in(t-1) would be better written as out_t and in_t-1. where t is time, expressed as clock ticks.

The expression out_t = in_t-1 means that the output during the current tick is whatever the input was during the prior tick. It is equivalent, and perhaps easier to visualize, to think that the output for the next tick is whatever the input is for this tick: out_t+1 = in_t.

In math, there are function definitions like

f₀ = 1,
f₁ = 1,
f_n = f_n-1 + f_n-2

where the next term in the sequence is the sum of the previous two terms. This particular function is the Fibonacci series: 1, 1, 2, 3, 5, 8, 13, ...

If you connect a DFF's output directly to its input, you get the function

f₀ = 0,
f_n = f_n-1

The DFF will remain in its initial state forever. f = 0, 0, 0, 0, ...

If you connect its output to its input through a NOT gate, you get the function

f₀ = 0,
f_n = NOT f_n-1

It will change state every clock tick. f = 0, 1, 0, 1, ...

It is important to understand that the DFF as used in synchronous logic is a delay element, not a long-term storage element. Additional circuitry must be added around the DFF to create a long-term storage element. This is what Bit.hdl does. It selectively connects the DFF's input to either the DFF's output or to the data to be stored.

--Mark

[jb]

CONTENTS DELETED

The author has deleted this message.

[cadet1620]

jbucaran wrote

Question: Why not simply connecting a Not gate to itself to produce the same result?

[The Not connected to itself is like the statement, "I always lie."]

If you don't have the DFF in the loop, the circuit will try to run infinitely fast. The function of the DFF is to regulate how fast the circuit can run; the DFF's output can change only once per clock cycle.

--Mark

[jb]

CONTENTS DELETED

The author has deleted this message.

[cadet1620]

Yes, the clock provides a synchronized delay.  In fact, for the Hack Computer you will design in Chapter 5, this is the system clock that ticks once per instruction cycle. The execution of the instruction uses combinatorial logic to compute the new values to be stored in memory/registers and the clock causes them to be stored. One of the registers that gets updated by the clock is the Program Counter, so a new instruction begins.

--Mark

[ybakos]

@jbucaran:

Spend some more time with chapter 14 of Code -- you'll get it. In addition, check out the interactive animations available here:

http://www.play-hookey.com/digital/rs_nand_latch.html

A helpful metaphor to think about (loosely) is the Panama Canal.