RAM16k

[dmoeller]

i have sel=address[12,13] for RAM16k, but i get the error "address[12 has an invalid sub bus specification. I get the same error when i change it to address[12..13].

[ybakos]

The sel input of what chip?

[22nds]

CONTENTS DELETED

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[cadet1620]

There is no error in the RAM16K I/O specification.

16K = 16384 = 2¹⁴

The RAM16K has 14 address bits. RAM16K is built using four RAM4K parts.

Please edit or delete your post.

--Admin

[guerraTron]

Greetings to all,

referring to the same topic in the interface of the RAM16K.hdl file appears:

... CHIP RAM16K { IN in[16], load, address[14]; ...

I think the "address" entry should contain 15 bits, not 14

[WBahn]

guerraTron wrote

Greetings to all,

<p>referring to the same topic in the interface of the RAM16K.hdl file appears:  </p>

<code>...
CHIP RAM16K {
 IN in[16], load, address[14];
...</code>

<p>I think the "address" entry should contain 15 bits, not 14</p>

Why do you think it should contain 15 bits?

Would you agree that a 1-bit address space can address 2 RAM cells (addresses 0 through 1)?
Would you agree that a 2-bit address space can address 4 RAM cells (addresses 0 through 3)?
Would you agree that a 3-bit address space can address 8 RAM cells (addresses 0 through 7)?

Would you agree that the pattern that is emerging is that an N-bit address space can address 2^N RAM cells (address 0 through 2^N - 1)?

So how many RAM cells are in a 16K RAM?

How many bits are needed to address that many cells?

[pm100]

you mean

"Would you agree that a 3-bit address space can address 8 RAM cells (addresses 0 through 7)?"

Alternative way

16 bits can address 64k
15 bits -> 32k
14 bits -> 16k

[WBahn]

Yes. Thanks for catching the typo. I'll go fix that.

[WBahn]

pm100 wrote

Alternative way

16 bits can address 64k
15 bits -> 32k
14 bits -> 16k

The only hiccup with this approach is that it requires the person to already accept and be comfortable with the notion that 16 bits can address a 64K address space.

[guerraTron]

True, you are absolutely right WBahn.
I was building 32K RAM  (8xRAM4K) instead of 16K.

1 Reg = 16xBit,
1 RAM8 = 8xReg (address: 3 bits),
1 RAM64 = 8xRAM8 (address: 3+3),
1 RAM512 = 8xRAM64 (address: 3+6)
1 RAM4K = 8xRAM512 (address: 3+9)
1 RAM16K = 4xRAM4K (address: 2+12)

Now they match me.. THANK YOU!