RAM64 Line27, a pin name is expected

[Leontocephaline]

Hi, I encountered this troubleshooting for no apparent reason. I checked numerous times and can find no illegal or missing pin name. Please help me! // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/03/a/RAM64.hdl /** * Memory of 64 registers, each 16 bit-wide. Out holds the value * stored at the memory location specified by address. If load==1, then * the in value is loaded into the memory location specified by address * (the loaded value will be emitted to out from the next time step onward). */ CHIP RAM64 { IN in[16], load, address[6]; OUT out[16]; PARTS: // Put your code here: DMux8Way(in=load, sel=address[3..5], a=q1, b=q2, c=q3, d=q4, e=q5, f=q6, g=q7, h=q8); RAM8(in=in, load=q1, address=address[0..2], out=w1,); RAM8(in=in, load=q2, address=address[0..2], out=w2,); RAM8(in=in, load=q3, address=address[0..2], out=w3,); RAM8(in=in, load=q4, address=address[0..2], out=w4,); RAM8(in=in, load=q5, address=address[0..2], out=w5,); RAM8(in=in, load=q6, address=address[0..2], out=w6,); RAM8(in=in, load=q7, address=address[0..2], out=w7,); RAM8(in=in, load=q8, address=address[0..2], out=w8,); Mux8Way16(a=w1, b=w2, c=w3, d=w4, e=w5, f=w6, g=w7, h=w8, sel=address[3..5], out=out); }

[WBahn]

Please format your post better. Don't expect others to wade through it. Though I can already see some syntax errors.

[Leontocephaline]

Fine

[WBahn]

Once you get it formatted and posted, I'll take a closer look and point out what I see.

[Leontocephaline]

CHIP RAM64 {
    IN in[16], load, address[6];
    OUT out[16];

    PARTS:
        DMux8Way(in=load, sel=address[3..5], a=q1, b=q2, c=q3, d=q4, e=q5, f=q6, g=q7, h=q8);
        RAM8(in=in, load=q1, address=address[0..2], out=w1,);
        RAM8(in=in, load=q2, address=address[0..2], out=w2,);
        RAM8(in=in, load=q3, address=address[0..2], out=w3,);
        RAM8(in=in, load=q4, address=address[0..2], out=w4,);
        RAM8(in=in, load=q5, address=address[0..2], out=w5,);
        RAM8(in=in, load=q6, address=address[0..2], out=w6,);
        RAM8(in=in, load=q7, address=address[0..2], out=w7,);
        RAM8(in=in, load=q8, address=address[0..2], out=w8,);
        Mux8Way16(a=w1, b=w2, c=w3, d=w4, e=w5, f=w6, g=w7, h=w8, sel=address[3..5], out=out);
}










Line27 in the title refers to the line where "RAM8" first appears.

[WBahn]

Much easier to look.

So look at the pin list for your RAM8 chip. The last pin given is out=w1, but this is followed by a comma, which tells the simulator to expect another pin connection. But there isn't one.

[Leontocephaline]

Thanks!