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Hi all.
I have got to the RAM64 and need a little bit of a nudge in the right direction. I have had no troubles until now but can't get my head around using the RAM8 to build the RAM64.
Thanks for any help.
h4l0
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Any chance of forwarding that "nudge" onto me? A little stuck myself.
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Administrator
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RAM64 looks a lot like RAM8, except that you replace the Registers with RAM8s, and some of the address bits need to go to the RAM8s.
--Mark
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Hi Mark,
Yep now you have said that its quite simple. :) Finished all the RAM chips now.
For some reason I just had a blank on the address bits.
Thank you very much!
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Thanks admin
finally i got RAM64 to work, i did many trials with DMux, DMux4way and Dmux8way
but finally got it right, just as you said
its exactly just similar to RAM8
1 DMux8Way
8 RAM8
1 Mux8Way16
the trick is in the address[6], i didnt know how to split it
finally i split it into 2 parts address[0..2] and address[3..5]
i used the same address in the DMux8Way and Mux8Way16
and same address to be send for all the RAM8
Thanks alot
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Hi, I'm also finished RAM64, but I have a puzzled about the last sentence of code,
"Mux8Way16(a=outa,b=outb,c=outc,d=outd,e=oute,f=outf,g=outg,h=outh,sel=address[3..5],out=out); "
That is 'address[3..5]', because I start using 'address[0..2]'.
When I running RAM64.hdl, it throw an error. so I tried to modiy '[3..5]' to '[0..2]' , unbelievably, RAM64.hdl was running well.
How can I understand this? Thank you in advance !
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Administrator
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Desmond.Song wrote
Hi, I'm also finished RAM64, but I have a puzzled about the last sentence of code,
"Mux8Way16(a=outa,b=outb,c=outc,d=outd,e=oute,f=outf,g=outg,h=outh,sel=address[3..5],out=out);"
That is 'address[3..5]', because I start using 'address[0..2]'.
When I running RAM64.hdl, it throw an error. so I tried to modify '[3..5]' to '[0..2]' , unbelievably, RAM64.hdl was running well.
You can use any 3 of the address bits in the output multiplexor, but you need to use the same 3 bits in the demultiplexor that handles 'load'. The 3 bits that are not used in the mux and demux must be used for the addresses for the RAM8s.
--Mark
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This post was updated on .
Thanks Mark. It's like encoding and decoding in communication !
--Desmond.Song
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Desmond.Song wrote
You can use any 3 of the address bits in the output multiplexor, but you need to use the same 3 bits in the demultiplexor that handles 'load'. The 3 bits that are not used in the mux and demux must be used for the addresses for the RAM8s.
--Mark
I think of the two parts of the address row and column, when I read the hint it triggered, on why 6 bits for address..
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