I'm struggling hard with the PC. It solution seems just out of reach.
Mux16(a=in, b=false, sel=reset, out=q);
Or(a=reset, b=load, out=q2);
Register(in=q, load=q2, out=q3);
Mux16(a=q3, b=q6, sel=inc, out=q4);
Register(in=q4, load=true, out=q5, out=out);
Inc16(in=q5, out=q6);
This setup obviously fails because when inc=1 the load command is by passed. I feel like these posts hold the key I just haven't been able to put the puzzle pieces together.
Start Here:
http://nand2tetris-questions-and-answers-forum.32033.n3.nabble.com/PC-struggle-td4028870.htmlHint: If you connect a Register's load to true it turns the Register into a 16-bit DFF.
Then you can make PC like you made bit Bit, except that the feedback wire is replaced with a circuit that computes the next value for the PC.
Also, in hardware it is often easier to generate all the options you might need and select the one that's required by the current control values. Think about handling the f bit in the ALU, but in this case there are more options.
Then This:
http://nand2tetris-questions-and-answers-forum.32033.n3.nabble.com/PC-Counter-td687060.htmlnote that the order of the if statements and the order of your circuitry are related
Chapter 3 has the remedy to your question. You can use one of the other chips in the chapter to control and recall different states of the counter. Hopefully this helps.
Interesting:
http://nand2tetris-questions-and-answers-forum.32033.n3.nabble.com/PC-Counter-td4030223.htmlJust an update/FYI I actually did figure this out after reading another comment of yours! My logic was flawed in the assumption that we only wanted the register's load bit to be 1 when we load from "in". I hope this isn't too much of a hint to others looking to solve this the "simple way" but we actually want the register's load bit to be true any time there is an operation requiring a state change in the register. From there it was a simple matter of combinational logic to construct what constitutes a state change - and voila!