Syntax question

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Syntax question

Hezi
Hi, I was wondering if the following is a legal syntax:

Mux4way16(a=input1, b=input2, c=input3, d=input4, sel=somebits, out=muxOutput);

SomeChip(in=someIn[0], out=input1[0]);
SomeChip(in=someIn[1], out=input1[2]);
.
.
.
OtherChip(in=otherIn[0], out=input2[0]);
.
.
.
etc.

So I beleive it is legal to use a bus before defining it, but is it also legal to define the bus one bit at a time? and if not, how can I work around this?
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Re: Syntax question

WBahn
Administrator
Hezi wrote
Hi, I was wondering if the following is a legal syntax:

Mux4way16(a=input1, b=input2, c=input3, d=input4, sel=somebits, out=muxOutput);

SomeChip(in=someIn[0], out=input1[0]);
SomeChip(in=someIn[1], out=input1[2]);
.
.
.
OtherChip(in=otherIn[0], out=input2[0]);
.
.
.
etc.

So I beleive it is legal to use a bus before defining it, but is it also legal to define the bus one bit at a time? and if not, how can I work around this?
What are someIn and otherIn?

It would appear that you are connecting input signals (e.g., input1[0]) to the outputs of other parts. If this is the case, this will case conflicts.

As for buses, the HDL the authors have devised only allows sub-bussing on top-level signals -- i.e., those that are defined as buses in the IN and OUT statements of a part.

This is inconvenient, but not insurmountable, since you can also sub-bus I/O signals of the parts you use (since those signals were declared in the IN and OUT statements of the part being used).
 
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Re: Syntax question

Hezi
Sorry, I must have used the wrong response option and emailed you instead of posting here.

"What are someIn and otherIn?"

These are actual inputs of the chip I am designing.

"It would appear that you are connecting input signals (e.g., input1[0]) to the outputs of other parts. If this is the case, this will case conflicts."

These are actually internal buses. I realize now the naming is really bad.

"As for buses, the HDL the authors have devised only allows sub-bussing on top-level signals -- i.e., those that are defined as buses in the IN and OUT statements of a part."

This is probably my problem, I am trying to sub-bus input1, input2... which are internal buses.
I guess I can workaround that using an And16 part.

"This is inconvenient, but not insurmountable, since you can also sub-bus I/O signals of the parts you use (since those signals were declared in the IN and OUT statements of the part being used)."

I think this is not relevant since input1, input2... are internal buses, am I right?
 
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Re: Syntax question

WBahn
Administrator
You shouldn't need to add parts due to the naming restrictions.

This is addressed in The Hardware Construction Survival Kit which is linked at the top of Chapter 3 Forum page.
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Re: Syntax question

Hezi
I am not working on one of the chips in the project right now, but on an extension of one: a bi-directional shift/rotate Byte register. I designed it so that the bits are simple DFFs to use less chips (recursively) but it may be possible to distribute some of the logic into a Bit chip and then implement the register using simple HDL just as the register in the project is being designed.