Technik, the thing that helped me most was drawing the smaller RAM arrays on paper. The larger arrays follow the same pattern of hierarchy and relationship to address bits, so once you grok the design of the first few RAM chips, I think you'll see it.
A drawing I use to illustrate this for students looks like this:
Do you see how the bits of the overall address serve as components that specify how to "navigate" to a particular block in the diagram?