What is wrong with my RAM64 Implementation?

[Jiangmh]

The code is below:

CHIP RAM64 {
    IN in[16], load, address[6];
    OUT out[16];

    PARTS:
        RAM8(in=in, load=load, address[0]=address[0], address[1]=address[1], address[2]=address[2], out=o1);
        RAM8(in=in, load=load, address[0]=address[0], address[1]=address[1], address[2]=address[2], out=o2);
        RAM8(in=in, load=load, address[0]=address[0], address[1]=address[1], address[2]=address[2], out=o3);
        RAM8(in=in, load=load, address[0]=address[0], address[1]=address[1], address[2]=address[2], out=o4);
        RAM8(in=in, load=load, address[0]=address[0], address[1]=address[1], address[2]=address[2], out=o5);
        RAM8(in=in, load=load, address[0]=address[0], address[1]=address[1], address[2]=address[2], out=o6);
        RAM8(in=in, load=load, address[0]=address[0], address[1]=address[1], address[2]=address[2], out=o7);
        RAM8(in=in, load=load, address[0]=address[0], address[1]=address[1], address[2]=address[2], out=o8);
       
        Mux8Way16(a=o1, b=o2, c=o3, d=o4, e=o5, f=o6, g=o7, h=o8, sel[0]=address[3], sel[1]=address[4], sel[2]=address[5], out=out);
}

[WBahn]

So if 'load' is 1, which RAM8 gets written to?

[Jiangmh]

Thanks for your reply, I have solved this problem.