Why does the instruction memory and data memory need to be time dependent?

[HighSchoolerWhoAsksHowTooMuch]

In the hack CPU, the Program Counter, Instruction Memory, and Data Memory (except the screen) are time dependent.

Why does the Memory need to be time-dependent if the PC, which determines what ROM instruction is run next, is time-dependent?

Thank you!

[HighSchoolerWhoAsksHowTooMuch]

In other words, doesn't the reset bit take 2 cycles to be implemented as it first needs to be the output of the PC which takes a clock cycle and then needs to make the next instruction be instruction 0 which is another clock cycle?

[WBahn]

As soon as the PC output changes, the address for the ROM changes and the contents at that address are output from the ROM as the current instruction, which is then decoded and acted upon by the CPU.

The ROM doesn't have a clock (in practice, it would likely have a write strobe that would be used to program it, but in emulation it is already programmed and can thus be viewed as a combinatorial part during operation).

[HighSchoolerWhoAsksHowTooMuch]

Thank you for the reply!

Is the reason that the Data memory is clocked so that the inM input to the CPU does not change until the entire operation is done?

[WBahn]

HighSchoolerWhoAsksHowTooMuch wrote

Thank you for the reply!

Is the reason that the Data memory is clocked so that the inM input to the CPU does not change until the entire operation is done?

Nope. Just like the ROM data signals, the inM signal only matters just before the next clock, so as long as it is stable at that time that's all that matters. The reason that the clock signal is needed is so that the correct data gets written to the correct location in RAM.

Imagine if there were no clock at all. When the address lines change, they do not change instantly or all at the same time. So, for instance, going from one address to another address that is different in four different bit positions, the value on the address bus will likely go through a sequence of five different address as the bits change. The same is true for the value on the data bus as those bits change. So you don't dare actually write a the value onto the data bus into the location indicated on the address bus until after all of those changes have settled. That is what the clock signal does because it's sole purpose is to control when the data on the data bus is written to the location whose address is on the address bus.

[HighSchoolerWhoAsksHowTooMuch]

Thank you! This makes sense!