how to build RAM4K

[davnav]

I have successfully simulated RAM64 chip. please advise how to make a RAM4K from RAM64 ?
4*2^10 = 2^12.  RAM4K is a combination of 64 combination of RAM64... i mean 64 number of Ram64 parallel connected ?

[cadet1620]

Follow the table in 3.2.3; make RAM512 before RAM4K.

--Mark

[davnav]

yes ...i successfuly completed RAM512. The same i parallely linked RAM512 ,,, but didn't work out?


CHIP RAM4K {
[Working implementation removed by admin.]
}


please advise where is going wrong?

[cadet1620]

Your RAM4K passes the test when run on my system using the built-in RAM512. This indicates that the problem is in either your RAM512 or RAM64.

The best way to debug this is to create a test subdirectory and copy just RAM512.hdl, .tst, and .cmp into it and make sure that it passes the test on your system. Next copy RAM512.hdl into the test subdirectory and rerun the test. If the test still passes, the problem must be in RAM64.hdl. (These should be the only HLD files that are in the project/03/2 directory.)

Note that passing test files does not guarantee that the tested chips are 100% correct, only that there is a very good chance that they are.

Read appendix section A.5.3 about buses. You don't need to do all the  sel[n]=address[n]  and  sel[n]=address[n]  connections. There is a syntax to connect a sub-bus to a bus with a single "=". This will save lots of typing, and greatly reduce the chance for a typo that may be causing a subtle error that is not being detected by the test scripts.

Also, please edit your post to remove the HDL since it is working code.

--Mark